hfi1 user SDMA request processing has two bugs that can cause data corruption for user SDMA requests that have multiple payload iovecs where an iovec other than the tail iovec does not run up to the page boundary for the buffer pointed to by that iovec.a Here are the specific bugs: 1. user_sdma_txadd() does not use struct user_sdma_iovec->iov.iov_len. Rather, user_sdma_txadd() will add up to PAGE_SIZE bytes from iovec to the packet, even if some of those bytes are past iovec->iov.iov_len and are thus not intended to be in the packet. 2. user_sdma_txadd() and user_sdma_send_pkts() fail to advance to the next iovec in user_sdma_request->iovs when the current iovec is not PAGE_SIZE and does not contain enough data to complete the packet. The transmitted packet will contain the wrong data from the iovec pages. This has not been an issue with SDMA packets from hfi1 Verbs or PSM2 because they only produce iovecs that end short of PAGE_SIZE as the tail iovec of an SDMA request. Fixing these bugs exposes other bugs with the SDMA pin cache (struct mmu_rb_handler) that get in way of supporting user SDMA requests with multiple payload iovecs whose buffers do not end at PAGE_SIZE. So this commit fixes those issues as well. Here are the mmu_rb_handler bugs that non-PAGE_SIZE-end multi-iovec payload user SDMA requests can hit: 1. Overlapping memory ranges in mmu_rb_handler will result in duplicate pinnings. 2. When extending an existing mmu_rb_handler entry (struct mmu_rb_node), the mmu_rb code (1) removes the existing entry under a lock, (2) releases that lock, pins the new pages, (3) then reacquires the lock to insert the extended mmu_rb_node. If someone else comes in and inserts an overlapping entry between (2) and (3), insert in (3) will fail. The failure path code in this case unpins _all_ pages in either the original mmu_rb_node or the new mmu_rb_node that was inserted between (2) and (3). 3. In hfi1_mmu_rb_remove_unless_exact(), mmu_rb_node->refcount is incremented outside of mmu_rb_handler->lock. As a result, mmu_rb_node could be evicted by another thread that gets mmu_rb_handler->lock and checks mmu_rb_node->refcount before mmu_rb_node->refcount is incremented. 4. Related to #2 above, SDMA request submission failure path does not check mmu_rb_node->refcount before freeing mmu_rb_node object. If there are other SDMA requests in progress whose iovecs have pointers to the now-freed mmu_rb_node(s), those pointers to the now-freed mmu_rb nodes will be dereferenced when those SDMA requests complete. Fixes: 7be85676f1d1 ("IB/hfi1: Don't remove RB entry when not needed.") Fixes: 7724105686e7 ("IB/hfi1: add driver files") Signed-off-by: Brendan Cunningham <bcunningham@cornelisnetworks.com> Signed-off-by: Patrick Kelsey <pat.kelsey@cornelisnetworks.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com> Link: https://lore.kernel.org/r/168088636445.3027109.10054635277810177889.stgit@252.162.96.66.static.eigbox.net Signed-off-by: Leon Romanovsky <leon@kernel.org>
869 lines
22 KiB
C
869 lines
22 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright(c) 2020 Intel Corporation.
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*
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*/
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/*
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* This file contains HFI1 support for IPOIB SDMA functionality
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*/
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#include <linux/log2.h>
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#include <linux/circ_buf.h>
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#include "sdma.h"
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#include "verbs.h"
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#include "trace_ibhdrs.h"
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#include "ipoib.h"
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#include "trace_tx.h"
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/* Add a convenience helper */
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#define CIRC_ADD(val, add, size) (((val) + (add)) & ((size) - 1))
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#define CIRC_NEXT(val, size) CIRC_ADD(val, 1, size)
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#define CIRC_PREV(val, size) CIRC_ADD(val, -1, size)
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struct ipoib_txparms {
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struct hfi1_devdata *dd;
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struct rdma_ah_attr *ah_attr;
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struct hfi1_ibport *ibp;
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struct hfi1_ipoib_txq *txq;
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union hfi1_ipoib_flow flow;
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u32 dqpn;
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u8 hdr_dwords;
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u8 entropy;
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};
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static struct ipoib_txreq *
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hfi1_txreq_from_idx(struct hfi1_ipoib_circ_buf *r, u32 idx)
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{
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return (struct ipoib_txreq *)(r->items + (idx << r->shift));
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}
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static u32 hfi1_ipoib_txreqs(const u64 sent, const u64 completed)
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{
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return sent - completed;
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}
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static u64 hfi1_ipoib_used(struct hfi1_ipoib_txq *txq)
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{
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return hfi1_ipoib_txreqs(txq->tx_ring.sent_txreqs,
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txq->tx_ring.complete_txreqs);
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}
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static void hfi1_ipoib_stop_txq(struct hfi1_ipoib_txq *txq)
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{
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trace_hfi1_txq_stop(txq);
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if (atomic_inc_return(&txq->tx_ring.stops) == 1)
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netif_stop_subqueue(txq->priv->netdev, txq->q_idx);
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}
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static void hfi1_ipoib_wake_txq(struct hfi1_ipoib_txq *txq)
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{
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trace_hfi1_txq_wake(txq);
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if (atomic_dec_and_test(&txq->tx_ring.stops))
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netif_wake_subqueue(txq->priv->netdev, txq->q_idx);
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}
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static uint hfi1_ipoib_ring_hwat(struct hfi1_ipoib_txq *txq)
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{
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return min_t(uint, txq->priv->netdev->tx_queue_len,
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txq->tx_ring.max_items - 1);
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}
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static uint hfi1_ipoib_ring_lwat(struct hfi1_ipoib_txq *txq)
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{
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return min_t(uint, txq->priv->netdev->tx_queue_len,
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txq->tx_ring.max_items) >> 1;
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}
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static void hfi1_ipoib_check_queue_depth(struct hfi1_ipoib_txq *txq)
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{
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++txq->tx_ring.sent_txreqs;
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if (hfi1_ipoib_used(txq) >= hfi1_ipoib_ring_hwat(txq) &&
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!atomic_xchg(&txq->tx_ring.ring_full, 1)) {
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trace_hfi1_txq_full(txq);
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hfi1_ipoib_stop_txq(txq);
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}
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}
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static void hfi1_ipoib_check_queue_stopped(struct hfi1_ipoib_txq *txq)
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{
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struct net_device *dev = txq->priv->netdev;
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/* If shutting down just return as queue state is irrelevant */
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if (unlikely(dev->reg_state != NETREG_REGISTERED))
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return;
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/*
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* When the queue has been drained to less than half full it will be
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* restarted.
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* The size of the txreq ring is fixed at initialization.
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* The tx queue len can be adjusted upward while the interface is
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* running.
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* The tx queue len can be large enough to overflow the txreq_ring.
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* Use the minimum of the current tx_queue_len or the rings max txreqs
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* to protect against ring overflow.
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*/
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if (hfi1_ipoib_used(txq) < hfi1_ipoib_ring_lwat(txq) &&
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atomic_xchg(&txq->tx_ring.ring_full, 0)) {
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trace_hfi1_txq_xmit_unstopped(txq);
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hfi1_ipoib_wake_txq(txq);
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}
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}
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static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget)
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{
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struct hfi1_ipoib_dev_priv *priv = tx->txq->priv;
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if (likely(!tx->sdma_status)) {
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dev_sw_netstats_tx_add(priv->netdev, 1, tx->skb->len);
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} else {
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++priv->netdev->stats.tx_errors;
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dd_dev_warn(priv->dd,
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"%s: Status = 0x%x pbc 0x%llx txq = %d sde = %d\n",
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__func__, tx->sdma_status,
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le64_to_cpu(tx->sdma_hdr->pbc), tx->txq->q_idx,
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tx->txq->sde->this_idx);
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}
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napi_consume_skb(tx->skb, budget);
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tx->skb = NULL;
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sdma_txclean(priv->dd, &tx->txreq);
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}
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static void hfi1_ipoib_drain_tx_ring(struct hfi1_ipoib_txq *txq)
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{
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struct hfi1_ipoib_circ_buf *tx_ring = &txq->tx_ring;
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int i;
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struct ipoib_txreq *tx;
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for (i = 0; i < tx_ring->max_items; i++) {
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tx = hfi1_txreq_from_idx(tx_ring, i);
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tx->complete = 0;
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dev_kfree_skb_any(tx->skb);
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tx->skb = NULL;
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sdma_txclean(txq->priv->dd, &tx->txreq);
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}
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tx_ring->head = 0;
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tx_ring->tail = 0;
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tx_ring->complete_txreqs = 0;
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tx_ring->sent_txreqs = 0;
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tx_ring->avail = hfi1_ipoib_ring_hwat(txq);
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}
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static int hfi1_ipoib_poll_tx_ring(struct napi_struct *napi, int budget)
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{
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struct hfi1_ipoib_txq *txq =
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container_of(napi, struct hfi1_ipoib_txq, napi);
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struct hfi1_ipoib_circ_buf *tx_ring = &txq->tx_ring;
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u32 head = tx_ring->head;
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u32 max_tx = tx_ring->max_items;
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int work_done;
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struct ipoib_txreq *tx = hfi1_txreq_from_idx(tx_ring, head);
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trace_hfi1_txq_poll(txq);
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for (work_done = 0; work_done < budget; work_done++) {
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/* See hfi1_ipoib_sdma_complete() */
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if (!smp_load_acquire(&tx->complete))
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break;
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tx->complete = 0;
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trace_hfi1_tx_produce(tx, head);
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hfi1_ipoib_free_tx(tx, budget);
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head = CIRC_NEXT(head, max_tx);
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tx = hfi1_txreq_from_idx(tx_ring, head);
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}
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tx_ring->complete_txreqs += work_done;
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/* Finished freeing tx items so store the head value. */
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smp_store_release(&tx_ring->head, head);
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hfi1_ipoib_check_queue_stopped(txq);
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if (work_done < budget)
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napi_complete_done(napi, work_done);
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return work_done;
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}
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static void hfi1_ipoib_sdma_complete(struct sdma_txreq *txreq, int status)
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{
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struct ipoib_txreq *tx = container_of(txreq, struct ipoib_txreq, txreq);
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trace_hfi1_txq_complete(tx->txq);
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tx->sdma_status = status;
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/* see hfi1_ipoib_poll_tx_ring */
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smp_store_release(&tx->complete, 1);
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napi_schedule_irqoff(&tx->txq->napi);
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}
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static int hfi1_ipoib_build_ulp_payload(struct ipoib_txreq *tx,
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struct ipoib_txparms *txp)
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{
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struct hfi1_devdata *dd = txp->dd;
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struct sdma_txreq *txreq = &tx->txreq;
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struct sk_buff *skb = tx->skb;
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int ret = 0;
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int i;
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if (skb_headlen(skb)) {
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ret = sdma_txadd_kvaddr(dd, txreq, skb->data, skb_headlen(skb));
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if (unlikely(ret))
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return ret;
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}
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for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
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const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
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ret = sdma_txadd_page(dd,
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NULL,
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txreq,
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skb_frag_page(frag),
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frag->bv_offset,
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skb_frag_size(frag));
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if (unlikely(ret))
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break;
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}
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return ret;
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}
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static int hfi1_ipoib_build_tx_desc(struct ipoib_txreq *tx,
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struct ipoib_txparms *txp)
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{
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struct hfi1_devdata *dd = txp->dd;
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struct sdma_txreq *txreq = &tx->txreq;
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struct hfi1_sdma_header *sdma_hdr = tx->sdma_hdr;
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u16 pkt_bytes =
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sizeof(sdma_hdr->pbc) + (txp->hdr_dwords << 2) + tx->skb->len;
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int ret;
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ret = sdma_txinit(txreq, 0, pkt_bytes, hfi1_ipoib_sdma_complete);
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if (unlikely(ret))
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return ret;
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/* add pbc + headers */
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ret = sdma_txadd_kvaddr(dd,
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txreq,
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sdma_hdr,
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sizeof(sdma_hdr->pbc) + (txp->hdr_dwords << 2));
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if (unlikely(ret))
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return ret;
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/* add the ulp payload */
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return hfi1_ipoib_build_ulp_payload(tx, txp);
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}
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static void hfi1_ipoib_build_ib_tx_headers(struct ipoib_txreq *tx,
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struct ipoib_txparms *txp)
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{
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struct hfi1_ipoib_dev_priv *priv = tx->txq->priv;
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struct hfi1_sdma_header *sdma_hdr = tx->sdma_hdr;
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struct sk_buff *skb = tx->skb;
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struct hfi1_pportdata *ppd = ppd_from_ibp(txp->ibp);
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struct rdma_ah_attr *ah_attr = txp->ah_attr;
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struct ib_other_headers *ohdr;
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struct ib_grh *grh;
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u16 dwords;
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u16 slid;
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u16 dlid;
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u16 lrh0;
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u32 bth0;
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u32 sqpn = (u32)(priv->netdev->dev_addr[1] << 16 |
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priv->netdev->dev_addr[2] << 8 |
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priv->netdev->dev_addr[3]);
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u16 payload_dwords;
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u8 pad_cnt;
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pad_cnt = -skb->len & 3;
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/* Includes ICRC */
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payload_dwords = ((skb->len + pad_cnt) >> 2) + SIZE_OF_CRC;
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/* header size in dwords LRH+BTH+DETH = (8+12+8)/4. */
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txp->hdr_dwords = 7;
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if (rdma_ah_get_ah_flags(ah_attr) & IB_AH_GRH) {
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grh = &sdma_hdr->hdr.ibh.u.l.grh;
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txp->hdr_dwords +=
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hfi1_make_grh(txp->ibp,
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grh,
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rdma_ah_read_grh(ah_attr),
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txp->hdr_dwords - LRH_9B_DWORDS,
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payload_dwords);
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lrh0 = HFI1_LRH_GRH;
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ohdr = &sdma_hdr->hdr.ibh.u.l.oth;
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} else {
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lrh0 = HFI1_LRH_BTH;
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ohdr = &sdma_hdr->hdr.ibh.u.oth;
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}
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lrh0 |= (rdma_ah_get_sl(ah_attr) & 0xf) << 4;
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lrh0 |= (txp->flow.sc5 & 0xf) << 12;
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dlid = opa_get_lid(rdma_ah_get_dlid(ah_attr), 9B);
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if (dlid == be16_to_cpu(IB_LID_PERMISSIVE)) {
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slid = be16_to_cpu(IB_LID_PERMISSIVE);
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} else {
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u16 lid = (u16)ppd->lid;
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if (lid) {
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lid |= rdma_ah_get_path_bits(ah_attr) &
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((1 << ppd->lmc) - 1);
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slid = lid;
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} else {
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slid = be16_to_cpu(IB_LID_PERMISSIVE);
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}
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}
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/* Includes ICRC */
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dwords = txp->hdr_dwords + payload_dwords;
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/* Build the lrh */
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sdma_hdr->hdr.hdr_type = HFI1_PKT_TYPE_9B;
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hfi1_make_ib_hdr(&sdma_hdr->hdr.ibh, lrh0, dwords, dlid, slid);
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/* Build the bth */
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bth0 = (IB_OPCODE_UD_SEND_ONLY << 24) | (pad_cnt << 20) | priv->pkey;
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ohdr->bth[0] = cpu_to_be32(bth0);
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ohdr->bth[1] = cpu_to_be32(txp->dqpn);
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ohdr->bth[2] = cpu_to_be32(mask_psn((u32)txp->txq->tx_ring.sent_txreqs));
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/* Build the deth */
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ohdr->u.ud.deth[0] = cpu_to_be32(priv->qkey);
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ohdr->u.ud.deth[1] = cpu_to_be32((txp->entropy <<
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HFI1_IPOIB_ENTROPY_SHIFT) | sqpn);
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/* Construct the pbc. */
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sdma_hdr->pbc =
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cpu_to_le64(create_pbc(ppd,
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ib_is_sc5(txp->flow.sc5) <<
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PBC_DC_INFO_SHIFT,
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0,
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sc_to_vlt(priv->dd, txp->flow.sc5),
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dwords - SIZE_OF_CRC +
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(sizeof(sdma_hdr->pbc) >> 2)));
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}
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static struct ipoib_txreq *hfi1_ipoib_send_dma_common(struct net_device *dev,
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struct sk_buff *skb,
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struct ipoib_txparms *txp)
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{
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struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
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struct hfi1_ipoib_txq *txq = txp->txq;
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struct ipoib_txreq *tx;
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struct hfi1_ipoib_circ_buf *tx_ring = &txq->tx_ring;
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u32 tail = tx_ring->tail;
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int ret;
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if (unlikely(!tx_ring->avail)) {
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u32 head;
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if (hfi1_ipoib_used(txq) >= hfi1_ipoib_ring_hwat(txq))
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/* This shouldn't happen with a stopped queue */
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return ERR_PTR(-ENOMEM);
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/* See hfi1_ipoib_poll_tx_ring() */
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head = smp_load_acquire(&tx_ring->head);
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tx_ring->avail =
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min_t(u32, hfi1_ipoib_ring_hwat(txq),
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CIRC_CNT(head, tail, tx_ring->max_items));
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} else {
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tx_ring->avail--;
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}
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tx = hfi1_txreq_from_idx(tx_ring, tail);
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trace_hfi1_txq_alloc_tx(txq);
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/* so that we can test if the sdma descriptors are there */
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tx->txreq.num_desc = 0;
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tx->txq = txq;
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tx->skb = skb;
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INIT_LIST_HEAD(&tx->txreq.list);
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hfi1_ipoib_build_ib_tx_headers(tx, txp);
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ret = hfi1_ipoib_build_tx_desc(tx, txp);
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if (likely(!ret)) {
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if (txq->flow.as_int != txp->flow.as_int) {
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txq->flow.tx_queue = txp->flow.tx_queue;
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txq->flow.sc5 = txp->flow.sc5;
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txq->sde =
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sdma_select_engine_sc(priv->dd,
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txp->flow.tx_queue,
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txp->flow.sc5);
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trace_hfi1_flow_switch(txq);
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}
|
|
|
|
return tx;
|
|
}
|
|
|
|
sdma_txclean(priv->dd, &tx->txreq);
|
|
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
static int hfi1_ipoib_submit_tx_list(struct net_device *dev,
|
|
struct hfi1_ipoib_txq *txq)
|
|
{
|
|
int ret;
|
|
u16 count_out;
|
|
|
|
ret = sdma_send_txlist(txq->sde,
|
|
iowait_get_ib_work(&txq->wait),
|
|
&txq->tx_list,
|
|
&count_out);
|
|
if (likely(!ret) || ret == -EBUSY || ret == -ECOMM)
|
|
return ret;
|
|
|
|
dd_dev_warn(txq->priv->dd, "cannot send skb tx list, err %d.\n", ret);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hfi1_ipoib_flush_tx_list(struct net_device *dev,
|
|
struct hfi1_ipoib_txq *txq)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (!list_empty(&txq->tx_list)) {
|
|
/* Flush the current list */
|
|
ret = hfi1_ipoib_submit_tx_list(dev, txq);
|
|
|
|
if (unlikely(ret))
|
|
if (ret != -EBUSY)
|
|
++dev->stats.tx_carrier_errors;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hfi1_ipoib_submit_tx(struct hfi1_ipoib_txq *txq,
|
|
struct ipoib_txreq *tx)
|
|
{
|
|
int ret;
|
|
|
|
ret = sdma_send_txreq(txq->sde,
|
|
iowait_get_ib_work(&txq->wait),
|
|
&tx->txreq,
|
|
txq->pkts_sent);
|
|
if (likely(!ret)) {
|
|
txq->pkts_sent = true;
|
|
iowait_starve_clear(txq->pkts_sent, &txq->wait);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int hfi1_ipoib_send_dma_single(struct net_device *dev,
|
|
struct sk_buff *skb,
|
|
struct ipoib_txparms *txp)
|
|
{
|
|
struct hfi1_ipoib_txq *txq = txp->txq;
|
|
struct hfi1_ipoib_circ_buf *tx_ring;
|
|
struct ipoib_txreq *tx;
|
|
int ret;
|
|
|
|
tx = hfi1_ipoib_send_dma_common(dev, skb, txp);
|
|
if (IS_ERR(tx)) {
|
|
int ret = PTR_ERR(tx);
|
|
|
|
dev_kfree_skb_any(skb);
|
|
|
|
if (ret == -ENOMEM)
|
|
++dev->stats.tx_errors;
|
|
else
|
|
++dev->stats.tx_carrier_errors;
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
tx_ring = &txq->tx_ring;
|
|
trace_hfi1_tx_consume(tx, tx_ring->tail);
|
|
/* consume tx */
|
|
smp_store_release(&tx_ring->tail, CIRC_NEXT(tx_ring->tail, tx_ring->max_items));
|
|
ret = hfi1_ipoib_submit_tx(txq, tx);
|
|
if (likely(!ret)) {
|
|
tx_ok:
|
|
trace_sdma_output_ibhdr(txq->priv->dd,
|
|
&tx->sdma_hdr->hdr,
|
|
ib_is_sc5(txp->flow.sc5));
|
|
hfi1_ipoib_check_queue_depth(txq);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
txq->pkts_sent = false;
|
|
|
|
if (ret == -EBUSY || ret == -ECOMM)
|
|
goto tx_ok;
|
|
|
|
/* mark complete and kick napi tx */
|
|
smp_store_release(&tx->complete, 1);
|
|
napi_schedule(&tx->txq->napi);
|
|
|
|
++dev->stats.tx_carrier_errors;
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static int hfi1_ipoib_send_dma_list(struct net_device *dev,
|
|
struct sk_buff *skb,
|
|
struct ipoib_txparms *txp)
|
|
{
|
|
struct hfi1_ipoib_txq *txq = txp->txq;
|
|
struct hfi1_ipoib_circ_buf *tx_ring;
|
|
struct ipoib_txreq *tx;
|
|
|
|
/* Has the flow change ? */
|
|
if (txq->flow.as_int != txp->flow.as_int) {
|
|
int ret;
|
|
|
|
trace_hfi1_flow_flush(txq);
|
|
ret = hfi1_ipoib_flush_tx_list(dev, txq);
|
|
if (unlikely(ret)) {
|
|
if (ret == -EBUSY)
|
|
++dev->stats.tx_dropped;
|
|
dev_kfree_skb_any(skb);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
}
|
|
tx = hfi1_ipoib_send_dma_common(dev, skb, txp);
|
|
if (IS_ERR(tx)) {
|
|
int ret = PTR_ERR(tx);
|
|
|
|
dev_kfree_skb_any(skb);
|
|
|
|
if (ret == -ENOMEM)
|
|
++dev->stats.tx_errors;
|
|
else
|
|
++dev->stats.tx_carrier_errors;
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
tx_ring = &txq->tx_ring;
|
|
trace_hfi1_tx_consume(tx, tx_ring->tail);
|
|
/* consume tx */
|
|
smp_store_release(&tx_ring->tail, CIRC_NEXT(tx_ring->tail, tx_ring->max_items));
|
|
list_add_tail(&tx->txreq.list, &txq->tx_list);
|
|
|
|
hfi1_ipoib_check_queue_depth(txq);
|
|
|
|
trace_sdma_output_ibhdr(txq->priv->dd,
|
|
&tx->sdma_hdr->hdr,
|
|
ib_is_sc5(txp->flow.sc5));
|
|
|
|
if (!netdev_xmit_more())
|
|
(void)hfi1_ipoib_flush_tx_list(dev, txq);
|
|
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
static u8 hfi1_ipoib_calc_entropy(struct sk_buff *skb)
|
|
{
|
|
if (skb_transport_header_was_set(skb)) {
|
|
u8 *hdr = (u8 *)skb_transport_header(skb);
|
|
|
|
return (hdr[0] ^ hdr[1] ^ hdr[2] ^ hdr[3]);
|
|
}
|
|
|
|
return (u8)skb_get_queue_mapping(skb);
|
|
}
|
|
|
|
int hfi1_ipoib_send(struct net_device *dev,
|
|
struct sk_buff *skb,
|
|
struct ib_ah *address,
|
|
u32 dqpn)
|
|
{
|
|
struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
|
|
struct ipoib_txparms txp;
|
|
struct rdma_netdev *rn = netdev_priv(dev);
|
|
|
|
if (unlikely(skb->len > rn->mtu + HFI1_IPOIB_ENCAP_LEN)) {
|
|
dd_dev_warn(priv->dd, "packet len %d (> %d) too long to send, dropping\n",
|
|
skb->len,
|
|
rn->mtu + HFI1_IPOIB_ENCAP_LEN);
|
|
++dev->stats.tx_dropped;
|
|
++dev->stats.tx_errors;
|
|
dev_kfree_skb_any(skb);
|
|
return NETDEV_TX_OK;
|
|
}
|
|
|
|
txp.dd = priv->dd;
|
|
txp.ah_attr = &ibah_to_rvtah(address)->attr;
|
|
txp.ibp = to_iport(priv->device, priv->port_num);
|
|
txp.txq = &priv->txqs[skb_get_queue_mapping(skb)];
|
|
txp.dqpn = dqpn;
|
|
txp.flow.sc5 = txp.ibp->sl_to_sc[rdma_ah_get_sl(txp.ah_attr)];
|
|
txp.flow.tx_queue = (u8)skb_get_queue_mapping(skb);
|
|
txp.entropy = hfi1_ipoib_calc_entropy(skb);
|
|
|
|
if (netdev_xmit_more() || !list_empty(&txp.txq->tx_list))
|
|
return hfi1_ipoib_send_dma_list(dev, skb, &txp);
|
|
|
|
return hfi1_ipoib_send_dma_single(dev, skb, &txp);
|
|
}
|
|
|
|
/*
|
|
* hfi1_ipoib_sdma_sleep - ipoib sdma sleep function
|
|
*
|
|
* This function gets called from sdma_send_txreq() when there are not enough
|
|
* sdma descriptors available to send the packet. It adds Tx queue's wait
|
|
* structure to sdma engine's dmawait list to be woken up when descriptors
|
|
* become available.
|
|
*/
|
|
static int hfi1_ipoib_sdma_sleep(struct sdma_engine *sde,
|
|
struct iowait_work *wait,
|
|
struct sdma_txreq *txreq,
|
|
uint seq,
|
|
bool pkts_sent)
|
|
{
|
|
struct hfi1_ipoib_txq *txq =
|
|
container_of(wait->iow, struct hfi1_ipoib_txq, wait);
|
|
|
|
write_seqlock(&sde->waitlock);
|
|
|
|
if (likely(txq->priv->netdev->reg_state == NETREG_REGISTERED)) {
|
|
if (sdma_progress(sde, seq, txreq)) {
|
|
write_sequnlock(&sde->waitlock);
|
|
return -EAGAIN;
|
|
}
|
|
|
|
if (list_empty(&txreq->list))
|
|
/* came from non-list submit */
|
|
list_add_tail(&txreq->list, &txq->tx_list);
|
|
if (list_empty(&txq->wait.list)) {
|
|
struct hfi1_ibport *ibp = &sde->ppd->ibport_data;
|
|
|
|
if (!atomic_xchg(&txq->tx_ring.no_desc, 1)) {
|
|
trace_hfi1_txq_queued(txq);
|
|
hfi1_ipoib_stop_txq(txq);
|
|
}
|
|
ibp->rvp.n_dmawait++;
|
|
iowait_queue(pkts_sent, wait->iow, &sde->dmawait);
|
|
}
|
|
|
|
write_sequnlock(&sde->waitlock);
|
|
return -EBUSY;
|
|
}
|
|
|
|
write_sequnlock(&sde->waitlock);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* hfi1_ipoib_sdma_wakeup - ipoib sdma wakeup function
|
|
*
|
|
* This function gets called when SDMA descriptors becomes available and Tx
|
|
* queue's wait structure was previously added to sdma engine's dmawait list.
|
|
*/
|
|
static void hfi1_ipoib_sdma_wakeup(struct iowait *wait, int reason)
|
|
{
|
|
struct hfi1_ipoib_txq *txq =
|
|
container_of(wait, struct hfi1_ipoib_txq, wait);
|
|
|
|
trace_hfi1_txq_wakeup(txq);
|
|
if (likely(txq->priv->netdev->reg_state == NETREG_REGISTERED))
|
|
iowait_schedule(wait, system_highpri_wq, WORK_CPU_UNBOUND);
|
|
}
|
|
|
|
static void hfi1_ipoib_flush_txq(struct work_struct *work)
|
|
{
|
|
struct iowait_work *ioww =
|
|
container_of(work, struct iowait_work, iowork);
|
|
struct iowait *wait = iowait_ioww_to_iow(ioww);
|
|
struct hfi1_ipoib_txq *txq =
|
|
container_of(wait, struct hfi1_ipoib_txq, wait);
|
|
struct net_device *dev = txq->priv->netdev;
|
|
|
|
if (likely(dev->reg_state == NETREG_REGISTERED) &&
|
|
likely(!hfi1_ipoib_flush_tx_list(dev, txq)))
|
|
if (atomic_xchg(&txq->tx_ring.no_desc, 0))
|
|
hfi1_ipoib_wake_txq(txq);
|
|
}
|
|
|
|
int hfi1_ipoib_txreq_init(struct hfi1_ipoib_dev_priv *priv)
|
|
{
|
|
struct net_device *dev = priv->netdev;
|
|
u32 tx_ring_size, tx_item_size;
|
|
struct hfi1_ipoib_circ_buf *tx_ring;
|
|
int i, j;
|
|
|
|
/*
|
|
* Ring holds 1 less than tx_ring_size
|
|
* Round up to next power of 2 in order to hold at least tx_queue_len
|
|
*/
|
|
tx_ring_size = roundup_pow_of_two(dev->tx_queue_len + 1);
|
|
tx_item_size = roundup_pow_of_two(sizeof(struct ipoib_txreq));
|
|
|
|
priv->txqs = kcalloc_node(dev->num_tx_queues,
|
|
sizeof(struct hfi1_ipoib_txq),
|
|
GFP_KERNEL,
|
|
priv->dd->node);
|
|
if (!priv->txqs)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < dev->num_tx_queues; i++) {
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[i];
|
|
struct ipoib_txreq *tx;
|
|
|
|
tx_ring = &txq->tx_ring;
|
|
iowait_init(&txq->wait,
|
|
0,
|
|
hfi1_ipoib_flush_txq,
|
|
NULL,
|
|
hfi1_ipoib_sdma_sleep,
|
|
hfi1_ipoib_sdma_wakeup,
|
|
NULL,
|
|
NULL);
|
|
txq->priv = priv;
|
|
txq->sde = NULL;
|
|
INIT_LIST_HEAD(&txq->tx_list);
|
|
atomic_set(&txq->tx_ring.stops, 0);
|
|
atomic_set(&txq->tx_ring.ring_full, 0);
|
|
atomic_set(&txq->tx_ring.no_desc, 0);
|
|
txq->q_idx = i;
|
|
txq->flow.tx_queue = 0xff;
|
|
txq->flow.sc5 = 0xff;
|
|
txq->pkts_sent = false;
|
|
|
|
netdev_queue_numa_node_write(netdev_get_tx_queue(dev, i),
|
|
priv->dd->node);
|
|
|
|
txq->tx_ring.items =
|
|
kvzalloc_node(array_size(tx_ring_size, tx_item_size),
|
|
GFP_KERNEL, priv->dd->node);
|
|
if (!txq->tx_ring.items)
|
|
goto free_txqs;
|
|
|
|
txq->tx_ring.max_items = tx_ring_size;
|
|
txq->tx_ring.shift = ilog2(tx_item_size);
|
|
txq->tx_ring.avail = hfi1_ipoib_ring_hwat(txq);
|
|
tx_ring = &txq->tx_ring;
|
|
for (j = 0; j < tx_ring_size; j++) {
|
|
hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr =
|
|
kzalloc_node(sizeof(*tx->sdma_hdr),
|
|
GFP_KERNEL, priv->dd->node);
|
|
if (!hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr)
|
|
goto free_txqs;
|
|
}
|
|
|
|
netif_napi_add_tx(dev, &txq->napi, hfi1_ipoib_poll_tx_ring);
|
|
}
|
|
|
|
return 0;
|
|
|
|
free_txqs:
|
|
for (i--; i >= 0; i--) {
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[i];
|
|
|
|
netif_napi_del(&txq->napi);
|
|
tx_ring = &txq->tx_ring;
|
|
for (j = 0; j < tx_ring_size; j++)
|
|
kfree(hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr);
|
|
kvfree(tx_ring->items);
|
|
}
|
|
|
|
kfree(priv->txqs);
|
|
priv->txqs = NULL;
|
|
return -ENOMEM;
|
|
}
|
|
|
|
static void hfi1_ipoib_drain_tx_list(struct hfi1_ipoib_txq *txq)
|
|
{
|
|
struct sdma_txreq *txreq;
|
|
struct sdma_txreq *txreq_tmp;
|
|
|
|
list_for_each_entry_safe(txreq, txreq_tmp, &txq->tx_list, list) {
|
|
struct ipoib_txreq *tx =
|
|
container_of(txreq, struct ipoib_txreq, txreq);
|
|
|
|
list_del(&txreq->list);
|
|
sdma_txclean(txq->priv->dd, &tx->txreq);
|
|
dev_kfree_skb_any(tx->skb);
|
|
tx->skb = NULL;
|
|
txq->tx_ring.complete_txreqs++;
|
|
}
|
|
|
|
if (hfi1_ipoib_used(txq))
|
|
dd_dev_warn(txq->priv->dd,
|
|
"txq %d not empty found %u requests\n",
|
|
txq->q_idx,
|
|
hfi1_ipoib_txreqs(txq->tx_ring.sent_txreqs,
|
|
txq->tx_ring.complete_txreqs));
|
|
}
|
|
|
|
void hfi1_ipoib_txreq_deinit(struct hfi1_ipoib_dev_priv *priv)
|
|
{
|
|
int i, j;
|
|
|
|
for (i = 0; i < priv->netdev->num_tx_queues; i++) {
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[i];
|
|
struct hfi1_ipoib_circ_buf *tx_ring = &txq->tx_ring;
|
|
|
|
iowait_cancel_work(&txq->wait);
|
|
iowait_sdma_drain(&txq->wait);
|
|
hfi1_ipoib_drain_tx_list(txq);
|
|
netif_napi_del(&txq->napi);
|
|
hfi1_ipoib_drain_tx_ring(txq);
|
|
for (j = 0; j < tx_ring->max_items; j++)
|
|
kfree(hfi1_txreq_from_idx(tx_ring, j)->sdma_hdr);
|
|
kvfree(tx_ring->items);
|
|
}
|
|
|
|
kfree(priv->txqs);
|
|
priv->txqs = NULL;
|
|
}
|
|
|
|
void hfi1_ipoib_napi_tx_enable(struct net_device *dev)
|
|
{
|
|
struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < dev->num_tx_queues; i++) {
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[i];
|
|
|
|
napi_enable(&txq->napi);
|
|
}
|
|
}
|
|
|
|
void hfi1_ipoib_napi_tx_disable(struct net_device *dev)
|
|
{
|
|
struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < dev->num_tx_queues; i++) {
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[i];
|
|
|
|
napi_disable(&txq->napi);
|
|
hfi1_ipoib_drain_tx_ring(txq);
|
|
}
|
|
}
|
|
|
|
void hfi1_ipoib_tx_timeout(struct net_device *dev, unsigned int q)
|
|
{
|
|
struct hfi1_ipoib_dev_priv *priv = hfi1_ipoib_priv(dev);
|
|
struct hfi1_ipoib_txq *txq = &priv->txqs[q];
|
|
|
|
dd_dev_info(priv->dd, "timeout txq %p q %u stopped %u stops %d no_desc %d ring_full %d\n",
|
|
txq, q,
|
|
__netif_subqueue_stopped(dev, txq->q_idx),
|
|
atomic_read(&txq->tx_ring.stops),
|
|
atomic_read(&txq->tx_ring.no_desc),
|
|
atomic_read(&txq->tx_ring.ring_full));
|
|
dd_dev_info(priv->dd, "sde %p engine %u\n",
|
|
txq->sde,
|
|
txq->sde ? txq->sde->this_idx : 0);
|
|
dd_dev_info(priv->dd, "flow %x\n", txq->flow.as_int);
|
|
dd_dev_info(priv->dd, "sent %llu completed %llu used %llu\n",
|
|
txq->tx_ring.sent_txreqs, txq->tx_ring.complete_txreqs,
|
|
hfi1_ipoib_used(txq));
|
|
dd_dev_info(priv->dd, "tx_queue_len %u max_items %u\n",
|
|
dev->tx_queue_len, txq->tx_ring.max_items);
|
|
dd_dev_info(priv->dd, "head %u tail %u\n",
|
|
txq->tx_ring.head, txq->tx_ring.tail);
|
|
dd_dev_info(priv->dd, "wait queued %u\n",
|
|
!list_empty(&txq->wait.list));
|
|
dd_dev_info(priv->dd, "tx_list empty %u\n",
|
|
list_empty(&txq->tx_list));
|
|
}
|
|
|