fa68bff7cf
Throttling here refers to the GT frequency being clipped. Each of the throttle reason attributes will have a 0 or 1 value depending upon whether there is throttling and also the specific reason for it. The following is a brief description of the sysfs throttle frequency attributes added: - throttle_reason_status: when set indicates that there is GT frequency clipping. - throttle_reason_pl1: when set indicates that PBM PL1 (platform or package PL1) has caused GT frequency clipping. - throttle_reason_pl2: when set indicates that PBM PL2 or PL3 (platform or package PL2 or PL3) has caused GT frequency clipping. - throttle_reason_pl4: when set indicates that PL4 or IccMax has caused GT frequency clipping. - throttle_reason_thermal: when set indicates that Thermal event has caused GT frequency clipping. - throttle_reason_prochot: when set indicates that PROCHOT# has caused GT frequency clipping. - throttle_reason_ratl: when set indicates that Running Average Thermal Limit has caused GT frequency clipping. - throttle_reason_vr_thermalert: when set indicates that Hot VR (any processor VR) has caused GT frequency clipping. - throttle_reason_vr_tdc: when set indicates that VR TDC (Thermal Design Current) has caused GT frequency clipping. Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com> Cc: Dale B Stimson <dale.b.stimson@intel.com> Reviewed-by: Andrzej Hajda <andrzej.hajda@intel.com> Signed-off-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220318233938.149744-8-andi.shyti@linux.intel.com
120 lines
3.6 KiB
C
120 lines
3.6 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef INTEL_RPS_H
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#define INTEL_RPS_H
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#include "intel_rps_types.h"
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#include "i915_reg_defs.h"
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struct i915_request;
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void intel_rps_init_early(struct intel_rps *rps);
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void intel_rps_init(struct intel_rps *rps);
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void intel_rps_sanitize(struct intel_rps *rps);
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void intel_rps_driver_register(struct intel_rps *rps);
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void intel_rps_driver_unregister(struct intel_rps *rps);
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void intel_rps_enable(struct intel_rps *rps);
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void intel_rps_disable(struct intel_rps *rps);
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void intel_rps_park(struct intel_rps *rps);
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void intel_rps_unpark(struct intel_rps *rps);
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void intel_rps_boost(struct i915_request *rq);
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void intel_rps_dec_waiters(struct intel_rps *rps);
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u32 intel_rps_get_boost_frequency(struct intel_rps *rps);
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int intel_rps_set_boost_frequency(struct intel_rps *rps, u32 freq);
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int intel_rps_set(struct intel_rps *rps, u8 val);
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void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive);
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int intel_gpu_freq(struct intel_rps *rps, int val);
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int intel_freq_opcode(struct intel_rps *rps, int val);
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u32 intel_rps_get_cagf(struct intel_rps *rps, u32 rpstat1);
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u32 intel_rps_read_actual_frequency(struct intel_rps *rps);
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u32 intel_rps_get_requested_frequency(struct intel_rps *rps);
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u32 intel_rps_get_min_frequency(struct intel_rps *rps);
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int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val);
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u32 intel_rps_get_max_frequency(struct intel_rps *rps);
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int intel_rps_set_max_frequency(struct intel_rps *rps, u32 val);
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u32 intel_rps_get_rp0_frequency(struct intel_rps *rps);
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u32 intel_rps_get_rp1_frequency(struct intel_rps *rps);
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u32 intel_rps_get_rpn_frequency(struct intel_rps *rps);
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u32 intel_rps_read_punit_req(struct intel_rps *rps);
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u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps);
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u32 intel_rps_read_state_cap(struct intel_rps *rps);
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void intel_rps_raise_unslice(struct intel_rps *rps);
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void intel_rps_lower_unslice(struct intel_rps *rps);
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u32 intel_rps_read_throttle_reason(struct intel_rps *rps);
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bool rps_read_mask_mmio(struct intel_rps *rps, i915_reg_t reg32, u32 mask);
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void gen5_rps_irq_handler(struct intel_rps *rps);
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void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
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void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir);
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static inline bool intel_rps_is_enabled(const struct intel_rps *rps)
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{
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return test_bit(INTEL_RPS_ENABLED, &rps->flags);
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}
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static inline void intel_rps_set_enabled(struct intel_rps *rps)
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{
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set_bit(INTEL_RPS_ENABLED, &rps->flags);
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}
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static inline void intel_rps_clear_enabled(struct intel_rps *rps)
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{
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clear_bit(INTEL_RPS_ENABLED, &rps->flags);
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}
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static inline bool intel_rps_is_active(const struct intel_rps *rps)
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{
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return test_bit(INTEL_RPS_ACTIVE, &rps->flags);
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}
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static inline void intel_rps_set_active(struct intel_rps *rps)
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{
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set_bit(INTEL_RPS_ACTIVE, &rps->flags);
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}
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static inline bool intel_rps_clear_active(struct intel_rps *rps)
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{
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return test_and_clear_bit(INTEL_RPS_ACTIVE, &rps->flags);
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}
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static inline bool intel_rps_has_interrupts(const struct intel_rps *rps)
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{
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return test_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
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}
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static inline void intel_rps_set_interrupts(struct intel_rps *rps)
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{
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set_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
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}
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static inline void intel_rps_clear_interrupts(struct intel_rps *rps)
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{
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clear_bit(INTEL_RPS_INTERRUPTS, &rps->flags);
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}
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static inline bool intel_rps_uses_timer(const struct intel_rps *rps)
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{
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return test_bit(INTEL_RPS_TIMER, &rps->flags);
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}
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static inline void intel_rps_set_timer(struct intel_rps *rps)
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{
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set_bit(INTEL_RPS_TIMER, &rps->flags);
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}
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static inline void intel_rps_clear_timer(struct intel_rps *rps)
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{
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clear_bit(INTEL_RPS_TIMER, &rps->flags);
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}
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#endif /* INTEL_RPS_H */
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