linux/arch/arm/mach-imx/headsmp.S
Nick Desaulniers a2faac3986 ARM: 9263/1: use .arch directives instead of assembler command line flags
Similar to commit a6c30873ee ("ARM: 8989/1: use .fpu assembler
directives instead of assembler arguments").

GCC and GNU binutils support setting the "sub arch" via -march=,
-Wa,-march, target function attribute, and .arch assembler directive.

Clang was missing support for -Wa,-march=, but this was implemented in
clang-13.

The behavior of both GCC and Clang is to
prefer -Wa,-march= over -march= for assembler and assembler-with-cpp
sources, but Clang will warn about the -march= being unused.

clang: warning: argument unused during compilation: '-march=armv6k'
[-Wunused-command-line-argument]

Since most assembler is non-conditionally assembled with one sub arch
(modulo arch/arm/delay-loop.S which conditionally is assembled as armv4
based on CONFIG_ARCH_RPC, and arch/arm/mach-at91/pm-suspend.S which is
conditionally assembled as armv7-a based on CONFIG_CPU_V7), prefer the
.arch assembler directive.

Add a few more instances found in compile testing as found by Arnd and
Nathan.

Link: 1d51c699b9
Link: https://bugs.llvm.org/show_bug.cgi?id=48894
Link: https://github.com/ClangBuiltLinux/linux/issues/1195
Link: https://github.com/ClangBuiltLinux/linux/issues/1315

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
2022-11-08 18:36:17 +00:00

38 lines
746 B
ArmAsm

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/assembler.h>
.arch armv7-a
diag_reg_offset:
.word g_diag_reg - .
.macro set_diag_reg
adr r0, diag_reg_offset
ldr r1, [r0]
add r1, r1, r0 @ r1 = physical &g_diag_reg
ldr r0, [r1]
mcr p15, 0, r0, c15, c0, 1 @ write diagnostic register
.endm
ENTRY(v7_secondary_startup)
ARM_BE8(setend be) @ go BE8 if entered LE
mrc p15, 0, r0, c0, c0, 0
lsl r0, r0, #16
lsr r0, r0, #20
/* 0xc07 is cortex A7's ID */
mov r1, #0xc00
orr r1, #0x7
cmp r0, r1
beq secondary_startup
set_diag_reg
b secondary_startup
ENDPROC(v7_secondary_startup)