22088bbb02
The DT schema coding convention expressed in Documentation/devicetree/bindings/example-schema.yaml expects entries in following order: - properties, patternProperties - required - if blocks, allOf with if-blocks - additionalProperties/unevaluatedProperties Re-order few schemas to match the convention to avoid repeating review comments for new patches using existing code as template. No functional changes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231016181909.368429-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
126 lines
3.9 KiB
YAML
126 lines
3.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/serial/nvidia,tegra20-hsuart.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver
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maintainers:
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- Thierry Reding <thierry.reding@gmail.com>
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- Jon Hunter <jonathanh@nvidia.com>
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properties:
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compatible:
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oneOf:
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- enum:
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- nvidia,tegra20-hsuart
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- nvidia,tegra30-hsuart
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- nvidia,tegra186-hsuart
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- nvidia,tegra194-hsuart
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- items:
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- const: nvidia,tegra124-hsuart
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- const: nvidia,tegra30-hsuart
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: module clock
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resets:
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items:
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- description: module reset
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reset-names:
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items:
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- const: serial
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dmas:
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items:
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- description: DMA channel used for reception
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- description: DMA channel used for transmission
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dma-names:
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items:
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- const: rx
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- const: tx
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nvidia,enable-modem-interrupt:
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$ref: /schemas/types.yaml#/definitions/flag
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description: Enable modem interrupts. Should be enable only if all 8 lines of UART controller
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are pinmuxed.
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nvidia,adjust-baud-rates:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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description: |
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List of entries providing percentage of baud rate adjustment within a range. Each entry
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contains a set of 3 values: range low/high and adjusted rate. When the baud rate set on the
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controller falls within the range mentioned in this field, the baud rate will be adjusted by
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percentage mentioned here.
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Example: <9600 115200 200>
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Increase baud rate by 2% when set baud rate falls within range 9600 to 115200.
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Standard UART devices are expected to have tolerance for baud rate error by -4 to +4 %. All
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Tegra devices till Tegra210 had this support. However, Tegra186 chip has a known hardware
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issue. UART RX baud rate tolerance level is 0% to +4% in 1-stop config. Otherwise, the
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received data will have corruption/invalid framing errors. Parker errata suggests adjusting
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baud rate to be higher than the deviations observed in TX.
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TX deviation of connected device can be captured over scope (or noted from its spec) for
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valid range and Tegra baud rate has to be set above actual TX baud rate observed. To do this
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we use nvidia,adjust-baud-rates.
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As an example, consider there is deviation observed in TX for baud rates as listed below. 0
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to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expcted and
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Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
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should be set equal to or above deviation observed for avoiding frame errors. Property
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should be set like this:
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nvidia,adjust-baud-rates = <0 9600 100>,
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<9600 115200 200>;
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items:
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items:
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- description: range lower bound
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- description: range upper bound
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- description: adjustment (in permyriad, i.e. 0.01%)
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- resets
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- reset-names
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- dmas
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- dma-names
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allOf:
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- $ref: serial.yaml
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/tegra30-car.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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serial@70006000 {
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compatible = "nvidia,tegra30-hsuart";
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reg = <0x70006000 0x40>;
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interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
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nvidia,enable-modem-interrupt;
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clocks = <&tegra_car TEGRA30_CLK_UARTA>;
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resets = <&tegra_car 6>;
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reset-names = "serial";
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dmas = <&apbdma 8>, <&apbdma 8>;
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dma-names = "rx", "tx";
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nvidia,adjust-baud-rates = <1000000 4000000 136>; /* 1.36% shift */
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};
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