974f83ec1e
ia64 currently organizes the iommu probing along machves, which isn't very helpful. Instead just try to probe for Intel IOMMUs in mem_init as they are properly described in ACPI and if none was found initialize the swiotlb buffer. The HP SBA handling is then only done delayed when the actual hardware is probed. Only in the case that we actually found usable IOMMUs we then set up the DMA ops and free the not needed swiotlb buffer. This scheme gets rid of the need for the dma_init machvec operation, and the dig_vtd machvec. Signed-off-by: Christoph Hellwig <hch@lst.de> Link: https://lkml.kernel.org/r/20190813072514.23299-24-hch@lst.de Signed-off-by: Tony Luck <tony.luck@intel.com>
73 lines
2.0 KiB
C
73 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_PCI_H
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#define _ASM_IA64_PCI_H
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/scatterlist.h>
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#include <asm/io.h>
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#include <asm/hw_irq.h>
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struct pci_vector_struct {
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__u16 segment; /* PCI Segment number */
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__u16 bus; /* PCI Bus number */
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__u32 pci_id; /* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
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__u8 pin; /* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
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__u32 irq; /* IRQ assigned */
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};
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/*
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* Can be used to override the logic in pci_scan_bus for skipping already-configured bus
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* numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
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* loader.
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*/
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#define pcibios_assign_all_busses() 0
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#define PCIBIOS_MIN_IO 0x1000
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#define PCIBIOS_MIN_MEM 0x10000000
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#define HAVE_PCI_MMAP
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#define ARCH_GENERIC_PCI_MMAP_RESOURCE
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#define arch_can_pci_mmap_wc() 1
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#define HAVE_PCI_LEGACY
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extern int pci_mmap_legacy_page_range(struct pci_bus *bus,
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struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state);
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char *pci_get_legacy_mem(struct pci_bus *bus);
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int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
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int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
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struct pci_controller {
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struct acpi_device *companion;
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void *iommu;
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int segment;
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int node; /* nearest node with memory or NUMA_NO_NODE for global allocation */
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void *platform_data;
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};
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#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
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#define pci_domain_nr(busdev) (PCI_CONTROLLER(busdev)->segment)
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extern struct pci_ops pci_root_ops;
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static inline int pci_proc_domain(struct pci_bus *bus)
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{
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return (pci_domain_nr(bus) != 0);
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}
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#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
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static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
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{
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return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
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}
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#endif /* _ASM_IA64_PCI_H */
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