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- Update EMAC AXI settings for Cyclone5 -----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmLjCjkUHGRpbmd1eWVu QGtlcm5lbC5vcmcACgkQGZQEC4GjKPSJ0g//R0HArX0pW/wXyfbRuMe+Poce6fgm OoO6gWvhdHE8ynLgd7b/idb45RIlDx7q1blWUur4Gj9GCUEs33lSXA/SwesXuCSR KNYAtMWzU9pgLstZgmAe1mwk5eeJW6+v2w8EA6+qSlr7PSHWe+ZoIAymmrDJH8sd CKrp1Lf6Dk/UZ7+Is5IBScRelRLxM8d981Z8YewpGNhGPYug2fopXwTIWGrlFyrc wzI/xXE7gpC3wfeFvTI4GpRc3u3P5EGObcf1hknSt4bpxWZ8zZD27wjCY6Ps9iMx T5uWqip/WD8EoWEmFjcj0iINerlPDKUoyr3D49t7yYL9jIfs368THkuncbAdDJkr wmP5GJObSp7oNI4JcDvrgDHufYKvC8Q61pEhmCnrhQzMIDuy+NQc1nuId3DNWB27 zerK5bMqngDBDs0jS+yYvWMrC9Us/aW2zUD9arDHSNLlpnBzMrg9rKpltg7PhFEx OFFSERFob1rXfPbmbvsJq/OZ5t03pPcEnsnyBIpmQHb/LItxEmZKEoOq3cbchhDo UvzdG8a9lLKkKDuvQoYNEp00yP0tOcRb4d0nn28Tgra01zuXyPcjUBw6Fk6/MRVz cn1/TCX7FuhkoTksKM+jVzexSr2wt+dUL+WMaVUfPOF6aYz+C61kJWIgHCfVeMyC SmgvgalX7HPF1QI= =atss -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLpMAoACgkQmmx57+YA GNkeBBAAksTeKlu9qsmJjUrmbQYAFhXx1QYklccSJx72fY9ncrUOA4z1aQZFvFda QIR+ZHA2M1yXtP5Vmfjj4y5xPnHAATIXYFc7jN1AdTncvIuAuh0mLj8cBOim+w0D Ly8fistZYbFrqAhGt4LNU8oveUuO0njy8DuiCn/qLh34xpEcKOMgpcqUtYjKljLv bXGLP8CMnCkM7tPP4Os7/1DcHSetUJUpwakO81S+/TltI2969OZBlz6/9bzzdb33 tI1x9qJgeIIjabXKEKmV2G+sG5B2xr9e8KUxv/Iqj46rdYaInimRfhSzl2lDH1D1 xicSTdm2L/AAZiV4bI7gK+9Dgl4tCf2GIRv1Qvt6gep4aWSA21iPuzDonMvF4YBp aRPVUXHZ8eLc6RgWP3iCfjge6zg75r7v3FnqB+PkkbD6IOO+QoKzV2QJqt3VLJiM jSLS1ZhtPjxxDp7xGyHxy5iDOlKQE3AIps6nA1QhIvhZsGKYO8LPHpkNHI/qpp4w MFmRqIF+RnJRsaccUBE5Upweav4JywcfJAOQtDvAYp2jcNmHY03BlSxEqFLYfEzW RmnxCt4n80K50d2JsPjHQ7QpxrMUn9JY5GSSg7Hc5b11mYUkzBZABh1Ke9t3f7Z0 kYPD++thOyHItS1r4+RedTzg97hk/POhRS4wF+vqnZoaS4KyosQ= =2reB -----END PGP SIGNATURE----- Merge tag 'socfpga_updates_for_v5.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/late SoCFPGA dts updates for v5.20, part 2 - Update EMAC AXI settings for Cyclone5 * tag 'socfpga_updates_for_v5.20_part2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: ARM: dts: add EMAC AXI settings for Cyclone5 arm64: dts: altera: socfpga_stratix10: move clocks out of soc node arm64: dts: Add support for Stratix 10 Software Virtual Platform dt-bindings: altera: document Stratix 10 SWVP compatibles arm64: dts: altera: adjust whitespace around '=' arm64: dts: intel: socfpga_agilex: use defined GIC interrupt type for ECC dt-bindings: altera: Add Chameleon v3 board ARM: dts: socfpga: Add Google Chameleon v3 devicetree ARM: dts: socfpga: Add atsha204a node to Mercury+ AA1 dts ARM: dts: socfpga: Move sdmmc-ecc node to Arria 10 dts ARM: dts: socfpga: Change Mercury+ AA1 dts to dtsi Link: https://lore.kernel.org/r/20220728223237.3184243-1-dinguyen@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>