Minghuan Lian 0e3d4373b8 powerpc/dts: fix sRIO error interrupt for b4860
For B4 platform, MPIC EISR register is in reversed bitmap order,
instead of "Error interrupt source 0-31. Bit 0 represents SRC0."
the correct ordering is "Error interrupt source 0-31. Bit 0
represents SRC31." This patch is to fix sRIO EISR bit value
of error interrupt in dts node.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2013-10-28 21:11:14 -05:00
..
2013-08-14 15:00:03 +10:00
2010-05-12 07:48:49 -04:00
2007-09-19 21:13:16 -05:00
2008-06-09 13:42:25 +10:00
2008-04-17 01:01:40 -05:00
2011-12-09 07:49:50 -05:00
2009-12-12 22:24:26 -07:00
2008-04-01 20:43:07 +11:00
2007-09-14 01:33:23 +10:00
2007-09-14 01:33:23 +10:00
2009-12-12 22:24:29 -07:00

To extract the kernel vmlinux, System.map, .config or initrd from the zImage binary:

objcopy -j .kernel:vmlinux -O binary zImage vmlinux.gz
objcopy -j .kernel:System.map -O binary zImage System.map.gz
objcopy -j .kernel:.config -O binary zImage config.gz
objcopy -j .kernel:initrd -O binary zImage.initrd initrd.gz


	Peter