linux/arch/x86/pci
Maciej W. Rozycki 0e8c6f56fa x86/PCI: Add support for the Intel 82426EX PIRQ router
The Intel 82426EX ISA Bridge (IB), a part of the Intel 82420EX PCIset, 
implements PCI interrupt steering with a PIRQ router in the form of two 
PIRQ Route Control registers, available in the PCI configuration space 
at locations 0x66 and 0x67 for the PIRQ0# and PIRQ1# lines respectively.

The semantics is the same as with the PIIX router, however it is not
clear if BIOSes use register indices or line numbers as the cookie to
identify PCI interrupts in their routing tables and therefore support
either scheme.

The IB is directly attached to the Intel 82425EX PCI System Controller 
(PSC) component of the chipset via a dedicated PSC/IB Link interface 
rather than the host bus or PCI.  Therefore it does not itself appear in 
the PCI configuration space even though it responds to configuration 
cycles addressing registers it implements.  Use 82425EX's identification 
then for determining the presence of the IB.

References:

[1] "82420EX PCIset Data Sheet, 82425EX PCI System Controller (PSC) and 
    82426EX ISA Bridge (IB)", Intel Corporation, Order Number: 
    290488-004, December 1995, Section 3.3.18 "PIRQ1RC/PIRQ0RC--PIRQ 
    Route Control Registers", p. 61

Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/alpine.DEB.2.21.2107200213490.9461@angie.orcam.me.uk
2021-08-10 23:31:43 +02:00
..
acpi.c x86/PCI: Remove node-local allocation when initialising host controller 2018-09-17 16:33:24 -05:00
amd_bus.c x86/msr: Rename MSR_K8_SYSCFG to MSR_AMD64_SYSCFG 2021-05-10 07:51:38 +02:00
broadcom_bus.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
bus_numa.c License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
bus_numa.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
ce4100.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 334 2019-06-05 17:37:06 +02:00
common.c x86/pci: Set default irq domain in pcibios_add_device() 2020-09-16 16:52:37 +02:00
direct.c x86/pci: Simplify code by using the new dmi_get_bios_year() helper 2018-02-23 08:20:30 +01:00
early.c PCI: Make early dump functionality generic 2018-06-29 20:06:07 -05:00
fixup.c PCI: Add AMD RS690 quirk to enable 64-bit DMA 2021-06-18 10:32:35 -05:00
i386.c x86/PCI: Make a kernel-doc comment a normal one 2020-11-27 13:43:09 +01:00
init.c x86/pci: Create PCI/MSI irqdomain after x86_init.pci.arch_init() 2021-02-10 22:06:47 +01:00
intel_mid_pci.c x86/PCI: Describe @reg for type1_access_ok() 2021-02-15 20:10:30 +01:00
irq.c x86/PCI: Add support for the Intel 82426EX PIRQ router 2021-08-10 23:31:43 +02:00
legacy.c treewide: Add SPDX license identifier for missed files 2019-05-21 10:50:45 +02:00
Makefile x86/PCI: Replace deprecated EXTRA_CFLAGS with ccflags-y 2019-11-21 07:49:27 -06:00
mmconfig_32.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 387 2019-06-05 17:37:11 +02:00
mmconfig_64.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
mmconfig-shared.c x86/pci: Return true/false (not 1/0) from bool functions 2021-05-27 18:51:17 -05:00
numachip.c x86/PCI: Add NumaChip SPDX GPL-2.0 to replace COPYING boilerplate 2019-11-21 07:49:22 -06:00
olpc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
pcbios.c maccess: rename probe_kernel_address to get_kernel_nofault 2020-06-18 11:14:40 -07:00
sta2x11-fixup.c dma-mapping: remove the dma_direct_set_offset export 2020-11-18 09:11:38 +01:00
xen.c x86/pci/xen: Use msi_msg shadow structs 2020-10-28 20:26:26 +01:00