9d664c0aec
Those architectures that have a special atomic_set implementation also need a special atomic_set_release(), because for the very same reason WRITE_ONCE() is broken for them, smp_store_release() is too. The vast majority is architectures that have spinlock hash based atomic implementation except hexagon which seems to have a hardware 'feature'. The spinlock based atomics should be SC, that is, none of them appear to place extra barriers in atomic_cmpxchg() or any of the other SC atomic primitives and therefore seem to rely on their spinlock implementation being SC (I did not fully validate all that). Therefore, the normal atomic_set() is SC and can be used at atomic_set_release(). Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Chris Metcalf <cmetcalf@mellanox.com> [for tile] Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: davem@davemloft.net Cc: james.hogan@imgtec.com Cc: jejb@parisc-linux.org Cc: rkuo@codeaurora.org Cc: vgupta@synopsys.com Link: http://lkml.kernel.org/r/20170609110506.yod47flaav3wgoj5@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
67 lines
2.2 KiB
C
67 lines
2.2 KiB
C
/* atomic.h: These still suck, but the I-cache hit rate is higher.
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*
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* Copyright (C) 1996 David S. Miller (davem@davemloft.net)
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* Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
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* Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
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*
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* Additions by Keith M Wesolowski (wesolows@foobazco.org) based
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* on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
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*/
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#ifndef __ARCH_SPARC_ATOMIC__
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#define __ARCH_SPARC_ATOMIC__
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#include <linux/types.h>
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#include <asm/cmpxchg.h>
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#include <asm/barrier.h>
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#include <asm-generic/atomic64.h>
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#define ATOMIC_INIT(i) { (i) }
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int atomic_add_return(int, atomic_t *);
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int atomic_fetch_add(int, atomic_t *);
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int atomic_fetch_and(int, atomic_t *);
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int atomic_fetch_or(int, atomic_t *);
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int atomic_fetch_xor(int, atomic_t *);
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int atomic_cmpxchg(atomic_t *, int, int);
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int atomic_xchg(atomic_t *, int);
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int __atomic_add_unless(atomic_t *, int, int);
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void atomic_set(atomic_t *, int);
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#define atomic_set_release(v, i) atomic_set((v), (i))
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#define atomic_read(v) ACCESS_ONCE((v)->counter)
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#define atomic_add(i, v) ((void)atomic_add_return( (int)(i), (v)))
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#define atomic_sub(i, v) ((void)atomic_add_return(-(int)(i), (v)))
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#define atomic_inc(v) ((void)atomic_add_return( 1, (v)))
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#define atomic_dec(v) ((void)atomic_add_return( -1, (v)))
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#define atomic_and(i, v) ((void)atomic_fetch_and((i), (v)))
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#define atomic_or(i, v) ((void)atomic_fetch_or((i), (v)))
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#define atomic_xor(i, v) ((void)atomic_fetch_xor((i), (v)))
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#define atomic_sub_return(i, v) (atomic_add_return(-(int)(i), (v)))
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#define atomic_fetch_sub(i, v) (atomic_fetch_add (-(int)(i), (v)))
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#define atomic_inc_return(v) (atomic_add_return( 1, (v)))
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#define atomic_dec_return(v) (atomic_add_return( -1, (v)))
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#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
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/*
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* atomic_inc_and_test - increment and test
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1
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* and returns true if the result is zero, or false for all
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* other cases.
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*/
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#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
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#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0)
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#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
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#endif /* !(__ARCH_SPARC_ATOMIC__) */
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