a35707c3d8
Some current cpus based on T-Head cores implement memory-types way different than described in the svpbmt spec even going so far as using PTE bits marked as reserved. Add the T-Head vendor-id and necessary errata code to replace the affected instructions. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220511192921.2223629-13-heiko@sntech.de Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
119 lines
3.2 KiB
C
119 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* alternative runtime patching
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* inspired by the ARM64 and x86 version
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*
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* Copyright (C) 2021 Sifive.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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#include <linux/uaccess.h>
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#include <asm/alternative.h>
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#include <asm/sections.h>
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#include <asm/vendorid_list.h>
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#include <asm/sbi.h>
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#include <asm/csr.h>
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struct cpu_manufacturer_info_t {
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unsigned long vendor_id;
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unsigned long arch_id;
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unsigned long imp_id;
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void (*vendor_patch_func)(struct alt_entry *begin, struct alt_entry *end,
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unsigned long archid, unsigned long impid,
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unsigned int stage);
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};
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static void __init_or_module riscv_fill_cpu_mfr_info(struct cpu_manufacturer_info_t *cpu_mfr_info)
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{
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#ifdef CONFIG_RISCV_M_MODE
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cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID);
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cpu_mfr_info->arch_id = csr_read(CSR_MARCHID);
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cpu_mfr_info->imp_id = csr_read(CSR_MIMPID);
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#else
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cpu_mfr_info->vendor_id = sbi_get_mvendorid();
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cpu_mfr_info->arch_id = sbi_get_marchid();
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cpu_mfr_info->imp_id = sbi_get_mimpid();
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#endif
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switch (cpu_mfr_info->vendor_id) {
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#ifdef CONFIG_ERRATA_SIFIVE
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case SIFIVE_VENDOR_ID:
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cpu_mfr_info->vendor_patch_func = sifive_errata_patch_func;
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break;
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#endif
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#ifdef CONFIG_ERRATA_THEAD
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case THEAD_VENDOR_ID:
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cpu_mfr_info->vendor_patch_func = thead_errata_patch_func;
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break;
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#endif
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default:
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cpu_mfr_info->vendor_patch_func = NULL;
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}
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}
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/*
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* This is called very early in the boot process (directly after we run
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* a feature detect on the boot CPU). No need to worry about other CPUs
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* here.
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*/
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static void __init_or_module _apply_alternatives(struct alt_entry *begin,
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struct alt_entry *end,
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unsigned int stage)
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{
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struct cpu_manufacturer_info_t cpu_mfr_info;
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riscv_fill_cpu_mfr_info(&cpu_mfr_info);
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riscv_cpufeature_patch_func(begin, end, stage);
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if (!cpu_mfr_info.vendor_patch_func)
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return;
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cpu_mfr_info.vendor_patch_func(begin, end,
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cpu_mfr_info.arch_id,
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cpu_mfr_info.imp_id,
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stage);
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}
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void __init apply_boot_alternatives(void)
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{
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/* If called on non-boot cpu things could go wrong */
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WARN_ON(smp_processor_id() != 0);
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_apply_alternatives((struct alt_entry *)__alt_start,
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(struct alt_entry *)__alt_end,
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RISCV_ALTERNATIVES_BOOT);
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}
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/*
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* apply_early_boot_alternatives() is called from setup_vm() with MMU-off.
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*
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* Following requirements should be honoured for it to work correctly:
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* 1) It should use PC-relative addressing for accessing kernel symbols.
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* To achieve this we always use GCC cmodel=medany.
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* 2) The compiler instrumentation for FTRACE will not work for setup_vm()
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* so disable compiler instrumentation when FTRACE is enabled.
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*
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* Currently, the above requirements are honoured by using custom CFLAGS
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* for alternative.o in kernel/Makefile.
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*/
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void __init apply_early_boot_alternatives(void)
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{
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#ifdef CONFIG_RISCV_ALTERNATIVE_EARLY
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_apply_alternatives((struct alt_entry *)__alt_start,
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(struct alt_entry *)__alt_end,
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RISCV_ALTERNATIVES_EARLY_BOOT);
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#endif
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}
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#ifdef CONFIG_MODULES
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void apply_module_alternatives(void *start, size_t length)
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{
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_apply_alternatives((struct alt_entry *)start,
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(struct alt_entry *)(start + length),
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RISCV_ALTERNATIVES_MODULE);
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}
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#endif
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