6405871820
Do a sanity check on the SCP image before loading it to avoid driver crashes. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230210031354.1335-1-tinghan.shen@mediatek.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
1017 lines
26 KiB
C
1017 lines
26 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2019 MediaTek Inc.
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#include <asm/barrier.h>
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#include <linux/clk.h>
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#include <linux/dma-mapping.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/platform_device.h>
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#include <linux/remoteproc.h>
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#include <linux/remoteproc/mtk_scp.h>
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#include <linux/rpmsg/mtk_rpmsg.h>
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#include "mtk_common.h"
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#include "remoteproc_internal.h"
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#define MAX_CODE_SIZE 0x500000
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#define SECTION_NAME_IPI_BUFFER ".ipi_buffer"
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/**
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* scp_get() - get a reference to SCP.
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*
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* @pdev: the platform device of the module requesting SCP platform
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* device for using SCP API.
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*
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* Return: Return NULL if failed. otherwise reference to SCP.
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**/
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struct mtk_scp *scp_get(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *scp_node;
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struct platform_device *scp_pdev;
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scp_node = of_parse_phandle(dev->of_node, "mediatek,scp", 0);
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if (!scp_node) {
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dev_err(dev, "can't get SCP node\n");
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return NULL;
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}
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scp_pdev = of_find_device_by_node(scp_node);
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of_node_put(scp_node);
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if (WARN_ON(!scp_pdev)) {
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dev_err(dev, "SCP pdev failed\n");
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return NULL;
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}
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return platform_get_drvdata(scp_pdev);
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}
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EXPORT_SYMBOL_GPL(scp_get);
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/**
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* scp_put() - "free" the SCP
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*
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* @scp: mtk_scp structure from scp_get().
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**/
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void scp_put(struct mtk_scp *scp)
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{
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put_device(scp->dev);
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}
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EXPORT_SYMBOL_GPL(scp_put);
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static void scp_wdt_handler(struct mtk_scp *scp, u32 scp_to_host)
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{
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dev_err(scp->dev, "SCP watchdog timeout! 0x%x", scp_to_host);
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rproc_report_crash(scp->rproc, RPROC_WATCHDOG);
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}
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static void scp_init_ipi_handler(void *data, unsigned int len, void *priv)
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{
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struct mtk_scp *scp = (struct mtk_scp *)priv;
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struct scp_run *run = (struct scp_run *)data;
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scp->run.signaled = run->signaled;
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strscpy(scp->run.fw_ver, run->fw_ver, SCP_FW_VER_LEN);
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scp->run.dec_capability = run->dec_capability;
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scp->run.enc_capability = run->enc_capability;
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wake_up_interruptible(&scp->run.wq);
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}
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static void scp_ipi_handler(struct mtk_scp *scp)
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{
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struct mtk_share_obj __iomem *rcv_obj = scp->recv_buf;
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struct scp_ipi_desc *ipi_desc = scp->ipi_desc;
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u8 tmp_data[SCP_SHARE_BUFFER_SIZE];
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scp_ipi_handler_t handler;
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u32 id = readl(&rcv_obj->id);
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u32 len = readl(&rcv_obj->len);
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if (len > SCP_SHARE_BUFFER_SIZE) {
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dev_err(scp->dev, "ipi message too long (len %d, max %d)", len,
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SCP_SHARE_BUFFER_SIZE);
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return;
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}
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if (id >= SCP_IPI_MAX) {
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dev_err(scp->dev, "No such ipi id = %d\n", id);
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return;
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}
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scp_ipi_lock(scp, id);
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handler = ipi_desc[id].handler;
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if (!handler) {
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dev_err(scp->dev, "No such ipi id = %d\n", id);
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scp_ipi_unlock(scp, id);
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return;
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}
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memcpy_fromio(tmp_data, &rcv_obj->share_buf, len);
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handler(tmp_data, len, ipi_desc[id].priv);
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scp_ipi_unlock(scp, id);
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scp->ipi_id_ack[id] = true;
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wake_up(&scp->ack_wq);
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}
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static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
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const struct firmware *fw,
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size_t *offset);
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static int scp_ipi_init(struct mtk_scp *scp, const struct firmware *fw)
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{
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int ret;
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size_t offset;
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/* read the ipi buf addr from FW itself first */
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ret = scp_elf_read_ipi_buf_addr(scp, fw, &offset);
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if (ret) {
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/* use default ipi buf addr if the FW doesn't have it */
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offset = scp->data->ipi_buf_offset;
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if (!offset)
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return ret;
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}
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dev_info(scp->dev, "IPI buf addr %#010zx\n", offset);
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scp->recv_buf = (struct mtk_share_obj __iomem *)
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(scp->sram_base + offset);
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scp->send_buf = (struct mtk_share_obj __iomem *)
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(scp->sram_base + offset + sizeof(*scp->recv_buf));
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memset_io(scp->recv_buf, 0, sizeof(*scp->recv_buf));
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memset_io(scp->send_buf, 0, sizeof(*scp->send_buf));
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return 0;
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}
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static void mt8183_scp_reset_assert(struct mtk_scp *scp)
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{
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u32 val;
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val = readl(scp->reg_base + MT8183_SW_RSTN);
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val &= ~MT8183_SW_RSTN_BIT;
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writel(val, scp->reg_base + MT8183_SW_RSTN);
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}
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static void mt8183_scp_reset_deassert(struct mtk_scp *scp)
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{
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u32 val;
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val = readl(scp->reg_base + MT8183_SW_RSTN);
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val |= MT8183_SW_RSTN_BIT;
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writel(val, scp->reg_base + MT8183_SW_RSTN);
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}
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static void mt8192_scp_reset_assert(struct mtk_scp *scp)
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{
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writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
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}
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static void mt8192_scp_reset_deassert(struct mtk_scp *scp)
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{
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writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_CLR);
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}
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static void mt8183_scp_irq_handler(struct mtk_scp *scp)
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{
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u32 scp_to_host;
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scp_to_host = readl(scp->reg_base + MT8183_SCP_TO_HOST);
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if (scp_to_host & MT8183_SCP_IPC_INT_BIT)
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scp_ipi_handler(scp);
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else
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scp_wdt_handler(scp, scp_to_host);
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/* SCP won't send another interrupt until we set SCP_TO_HOST to 0. */
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writel(MT8183_SCP_IPC_INT_BIT | MT8183_SCP_WDT_INT_BIT,
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scp->reg_base + MT8183_SCP_TO_HOST);
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}
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static void mt8192_scp_irq_handler(struct mtk_scp *scp)
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{
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u32 scp_to_host;
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scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET);
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if (scp_to_host & MT8192_SCP_IPC_INT_BIT) {
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scp_ipi_handler(scp);
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/*
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* SCP won't send another interrupt until we clear
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* MT8192_SCP2APMCU_IPC.
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*/
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writel(MT8192_SCP_IPC_INT_BIT,
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scp->reg_base + MT8192_SCP2APMCU_IPC_CLR);
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} else {
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scp_wdt_handler(scp, scp_to_host);
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writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ);
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}
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}
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static irqreturn_t scp_irq_handler(int irq, void *priv)
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{
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struct mtk_scp *scp = priv;
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int ret;
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ret = clk_prepare_enable(scp->clk);
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if (ret) {
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dev_err(scp->dev, "failed to enable clocks\n");
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return IRQ_NONE;
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}
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scp->data->scp_irq_handler(scp);
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clk_disable_unprepare(scp->clk);
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return IRQ_HANDLED;
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}
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static int scp_elf_load_segments(struct rproc *rproc, const struct firmware *fw)
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{
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struct device *dev = &rproc->dev;
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struct elf32_hdr *ehdr;
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struct elf32_phdr *phdr;
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int i, ret = 0;
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const u8 *elf_data = fw->data;
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ehdr = (struct elf32_hdr *)elf_data;
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phdr = (struct elf32_phdr *)(elf_data + ehdr->e_phoff);
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/* go through the available ELF segments */
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for (i = 0; i < ehdr->e_phnum; i++, phdr++) {
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u32 da = phdr->p_paddr;
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u32 memsz = phdr->p_memsz;
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u32 filesz = phdr->p_filesz;
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u32 offset = phdr->p_offset;
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void __iomem *ptr;
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dev_dbg(dev, "phdr: type %d da 0x%x memsz 0x%x filesz 0x%x\n",
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phdr->p_type, da, memsz, filesz);
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if (phdr->p_type != PT_LOAD)
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continue;
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if (!filesz)
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continue;
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if (filesz > memsz) {
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dev_err(dev, "bad phdr filesz 0x%x memsz 0x%x\n",
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filesz, memsz);
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ret = -EINVAL;
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break;
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}
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if (offset + filesz > fw->size) {
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dev_err(dev, "truncated fw: need 0x%x avail 0x%zx\n",
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offset + filesz, fw->size);
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ret = -EINVAL;
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break;
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}
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/* grab the kernel address for this device address */
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ptr = (void __iomem *)rproc_da_to_va(rproc, da, memsz, NULL);
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if (!ptr) {
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dev_err(dev, "bad phdr da 0x%x mem 0x%x\n", da, memsz);
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ret = -EINVAL;
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break;
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}
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/* put the segment where the remote processor expects it */
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scp_memcpy_aligned(ptr, elf_data + phdr->p_offset, filesz);
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}
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return ret;
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}
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static int scp_elf_read_ipi_buf_addr(struct mtk_scp *scp,
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const struct firmware *fw,
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size_t *offset)
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{
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struct elf32_hdr *ehdr;
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struct elf32_shdr *shdr, *shdr_strtab;
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int i;
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const u8 *elf_data = fw->data;
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const char *strtab;
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ehdr = (struct elf32_hdr *)elf_data;
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shdr = (struct elf32_shdr *)(elf_data + ehdr->e_shoff);
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shdr_strtab = shdr + ehdr->e_shstrndx;
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strtab = (const char *)(elf_data + shdr_strtab->sh_offset);
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for (i = 0; i < ehdr->e_shnum; i++, shdr++) {
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if (strcmp(strtab + shdr->sh_name,
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SECTION_NAME_IPI_BUFFER) == 0) {
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*offset = shdr->sh_addr;
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return 0;
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}
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}
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return -ENOENT;
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}
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static int mt8183_scp_clk_get(struct mtk_scp *scp)
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{
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struct device *dev = scp->dev;
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int ret = 0;
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scp->clk = devm_clk_get(dev, "main");
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if (IS_ERR(scp->clk)) {
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dev_err(dev, "Failed to get clock\n");
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ret = PTR_ERR(scp->clk);
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}
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return ret;
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}
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static int mt8192_scp_clk_get(struct mtk_scp *scp)
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{
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return mt8183_scp_clk_get(scp);
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}
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static int mt8195_scp_clk_get(struct mtk_scp *scp)
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{
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scp->clk = NULL;
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return 0;
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}
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static int mt8183_scp_before_load(struct mtk_scp *scp)
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{
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/* Clear SCP to host interrupt */
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writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
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/* Reset clocks before loading FW */
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writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
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writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
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/* Initialize TCM before loading FW. */
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writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
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writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
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/* Turn on the power of SCP's SRAM before using it. */
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writel(0x0, scp->reg_base + MT8183_SCP_SRAM_PDN);
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/*
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* Set I-cache and D-cache size before loading SCP FW.
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* SCP SRAM logical address may change when cache size setting differs.
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*/
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writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
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scp->reg_base + MT8183_SCP_CACHE_CON);
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writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
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return 0;
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}
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static void scp_sram_power_on(void __iomem *addr, u32 reserved_mask)
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{
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int i;
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for (i = 31; i >= 0; i--)
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writel(GENMASK(i, 0) & ~reserved_mask, addr);
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writel(0, addr);
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}
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static void scp_sram_power_off(void __iomem *addr, u32 reserved_mask)
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{
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int i;
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writel(0, addr);
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for (i = 0; i < 32; i++)
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writel(GENMASK(i, 0) & ~reserved_mask, addr);
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}
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static int mt8186_scp_before_load(struct mtk_scp *scp)
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{
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/* Clear SCP to host interrupt */
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writel(MT8183_SCP_IPC_INT_BIT, scp->reg_base + MT8183_SCP_TO_HOST);
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/* Reset clocks before loading FW */
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writel(0x0, scp->reg_base + MT8183_SCP_CLK_SW_SEL);
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writel(0x0, scp->reg_base + MT8183_SCP_CLK_DIV_SEL);
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/* Turn on the power of SCP's SRAM before using it. Enable 1 block per time*/
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scp_sram_power_on(scp->reg_base + MT8183_SCP_SRAM_PDN, 0);
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/* Initialize TCM before loading FW. */
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writel(0x0, scp->reg_base + MT8183_SCP_L1_SRAM_PD);
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writel(0x0, scp->reg_base + MT8183_SCP_TCM_TAIL_SRAM_PD);
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writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_P1);
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writel(0x0, scp->reg_base + MT8186_SCP_L1_SRAM_PD_p2);
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/*
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* Set I-cache and D-cache size before loading SCP FW.
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* SCP SRAM logical address may change when cache size setting differs.
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*/
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writel(MT8183_SCP_CACHE_CON_WAYEN | MT8183_SCP_CACHESIZE_8KB,
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scp->reg_base + MT8183_SCP_CACHE_CON);
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writel(MT8183_SCP_CACHESIZE_8KB, scp->reg_base + MT8183_SCP_DCACHE_CON);
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return 0;
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}
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static int mt8192_scp_before_load(struct mtk_scp *scp)
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{
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/* clear SPM interrupt, SCP2SPM_IPC_CLR */
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writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
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writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
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/* enable SRAM clock */
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scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
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scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
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scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
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scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
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scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
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/* enable MPU for all memory regions */
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writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
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return 0;
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}
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static int mt8195_scp_before_load(struct mtk_scp *scp)
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{
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/* clear SPM interrupt, SCP2SPM_IPC_CLR */
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writel(0xff, scp->reg_base + MT8192_SCP2SPM_IPC_CLR);
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writel(1, scp->reg_base + MT8192_CORE0_SW_RSTN_SET);
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/* enable SRAM clock */
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scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
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scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
|
|
scp_sram_power_on(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
|
|
scp_sram_power_on(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
|
|
MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
|
|
scp_sram_power_on(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
|
|
|
|
/* enable MPU for all memory regions */
|
|
writel(0xff, scp->reg_base + MT8192_CORE0_MEM_ATT_PREDEF);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int scp_load(struct rproc *rproc, const struct firmware *fw)
|
|
{
|
|
struct mtk_scp *scp = rproc->priv;
|
|
struct device *dev = scp->dev;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(scp->clk);
|
|
if (ret) {
|
|
dev_err(dev, "failed to enable clocks\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Hold SCP in reset while loading FW. */
|
|
scp->data->scp_reset_assert(scp);
|
|
|
|
ret = scp->data->scp_before_load(scp);
|
|
if (ret < 0)
|
|
goto leave;
|
|
|
|
ret = scp_elf_load_segments(rproc, fw);
|
|
leave:
|
|
clk_disable_unprepare(scp->clk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int scp_parse_fw(struct rproc *rproc, const struct firmware *fw)
|
|
{
|
|
struct mtk_scp *scp = rproc->priv;
|
|
struct device *dev = scp->dev;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(scp->clk);
|
|
if (ret) {
|
|
dev_err(dev, "failed to enable clocks\n");
|
|
return ret;
|
|
}
|
|
|
|
ret = scp_ipi_init(scp, fw);
|
|
clk_disable_unprepare(scp->clk);
|
|
return ret;
|
|
}
|
|
|
|
static int scp_start(struct rproc *rproc)
|
|
{
|
|
struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
|
|
struct device *dev = scp->dev;
|
|
struct scp_run *run = &scp->run;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(scp->clk);
|
|
if (ret) {
|
|
dev_err(dev, "failed to enable clocks\n");
|
|
return ret;
|
|
}
|
|
|
|
run->signaled = false;
|
|
|
|
scp->data->scp_reset_deassert(scp);
|
|
|
|
ret = wait_event_interruptible_timeout(
|
|
run->wq,
|
|
run->signaled,
|
|
msecs_to_jiffies(2000));
|
|
|
|
if (ret == 0) {
|
|
dev_err(dev, "wait SCP initialization timeout!\n");
|
|
ret = -ETIME;
|
|
goto stop;
|
|
}
|
|
if (ret == -ERESTARTSYS) {
|
|
dev_err(dev, "wait SCP interrupted by a signal!\n");
|
|
goto stop;
|
|
}
|
|
|
|
clk_disable_unprepare(scp->clk);
|
|
dev_info(dev, "SCP is ready. FW version %s\n", run->fw_ver);
|
|
|
|
return 0;
|
|
|
|
stop:
|
|
scp->data->scp_reset_assert(scp);
|
|
clk_disable_unprepare(scp->clk);
|
|
return ret;
|
|
}
|
|
|
|
static void *mt8183_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
|
|
{
|
|
int offset;
|
|
|
|
if (da < scp->sram_size) {
|
|
offset = da;
|
|
if (offset >= 0 && (offset + len) <= scp->sram_size)
|
|
return (void __force *)scp->sram_base + offset;
|
|
} else if (scp->dram_size) {
|
|
offset = da - scp->dma_addr;
|
|
if (offset >= 0 && (offset + len) <= scp->dram_size)
|
|
return scp->cpu_addr + offset;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static void *mt8192_scp_da_to_va(struct mtk_scp *scp, u64 da, size_t len)
|
|
{
|
|
int offset;
|
|
|
|
if (da >= scp->sram_phys &&
|
|
(da + len) <= scp->sram_phys + scp->sram_size) {
|
|
offset = da - scp->sram_phys;
|
|
return (void __force *)scp->sram_base + offset;
|
|
}
|
|
|
|
/* optional memory region */
|
|
if (scp->l1tcm_size &&
|
|
da >= scp->l1tcm_phys &&
|
|
(da + len) <= scp->l1tcm_phys + scp->l1tcm_size) {
|
|
offset = da - scp->l1tcm_phys;
|
|
return (void __force *)scp->l1tcm_base + offset;
|
|
}
|
|
|
|
/* optional memory region */
|
|
if (scp->dram_size &&
|
|
da >= scp->dma_addr &&
|
|
(da + len) <= scp->dma_addr + scp->dram_size) {
|
|
offset = da - scp->dma_addr;
|
|
return scp->cpu_addr + offset;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static void *scp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
|
|
{
|
|
struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
|
|
|
|
return scp->data->scp_da_to_va(scp, da, len);
|
|
}
|
|
|
|
static void mt8183_scp_stop(struct mtk_scp *scp)
|
|
{
|
|
/* Disable SCP watchdog */
|
|
writel(0, scp->reg_base + MT8183_WDT_CFG);
|
|
}
|
|
|
|
static void mt8192_scp_stop(struct mtk_scp *scp)
|
|
{
|
|
/* Disable SRAM clock */
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
|
|
|
|
/* Disable SCP watchdog */
|
|
writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
|
|
}
|
|
|
|
static void mt8195_scp_stop(struct mtk_scp *scp)
|
|
{
|
|
/* Disable SRAM clock */
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_0, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_1, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L2TCM_SRAM_PD_2, 0);
|
|
scp_sram_power_off(scp->reg_base + MT8192_L1TCM_SRAM_PDN,
|
|
MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS);
|
|
scp_sram_power_off(scp->reg_base + MT8192_CPU0_SRAM_PD, 0);
|
|
|
|
/* Disable SCP watchdog */
|
|
writel(0, scp->reg_base + MT8192_CORE0_WDT_CFG);
|
|
}
|
|
|
|
static int scp_stop(struct rproc *rproc)
|
|
{
|
|
struct mtk_scp *scp = (struct mtk_scp *)rproc->priv;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(scp->clk);
|
|
if (ret) {
|
|
dev_err(scp->dev, "failed to enable clocks\n");
|
|
return ret;
|
|
}
|
|
|
|
scp->data->scp_reset_assert(scp);
|
|
scp->data->scp_stop(scp);
|
|
clk_disable_unprepare(scp->clk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct rproc_ops scp_ops = {
|
|
.start = scp_start,
|
|
.stop = scp_stop,
|
|
.load = scp_load,
|
|
.da_to_va = scp_da_to_va,
|
|
.parse_fw = scp_parse_fw,
|
|
.sanity_check = rproc_elf_sanity_check,
|
|
};
|
|
|
|
/**
|
|
* scp_get_device() - get device struct of SCP
|
|
*
|
|
* @scp: mtk_scp structure
|
|
**/
|
|
struct device *scp_get_device(struct mtk_scp *scp)
|
|
{
|
|
return scp->dev;
|
|
}
|
|
EXPORT_SYMBOL_GPL(scp_get_device);
|
|
|
|
/**
|
|
* scp_get_rproc() - get rproc struct of SCP
|
|
*
|
|
* @scp: mtk_scp structure
|
|
**/
|
|
struct rproc *scp_get_rproc(struct mtk_scp *scp)
|
|
{
|
|
return scp->rproc;
|
|
}
|
|
EXPORT_SYMBOL_GPL(scp_get_rproc);
|
|
|
|
/**
|
|
* scp_get_vdec_hw_capa() - get video decoder hardware capability
|
|
*
|
|
* @scp: mtk_scp structure
|
|
*
|
|
* Return: video decoder hardware capability
|
|
**/
|
|
unsigned int scp_get_vdec_hw_capa(struct mtk_scp *scp)
|
|
{
|
|
return scp->run.dec_capability;
|
|
}
|
|
EXPORT_SYMBOL_GPL(scp_get_vdec_hw_capa);
|
|
|
|
/**
|
|
* scp_get_venc_hw_capa() - get video encoder hardware capability
|
|
*
|
|
* @scp: mtk_scp structure
|
|
*
|
|
* Return: video encoder hardware capability
|
|
**/
|
|
unsigned int scp_get_venc_hw_capa(struct mtk_scp *scp)
|
|
{
|
|
return scp->run.enc_capability;
|
|
}
|
|
EXPORT_SYMBOL_GPL(scp_get_venc_hw_capa);
|
|
|
|
/**
|
|
* scp_mapping_dm_addr() - Mapping SRAM/DRAM to kernel virtual address
|
|
*
|
|
* @scp: mtk_scp structure
|
|
* @mem_addr: SCP views memory address
|
|
*
|
|
* Mapping the SCP's SRAM address /
|
|
* DMEM (Data Extended Memory) memory address /
|
|
* Working buffer memory address to
|
|
* kernel virtual address.
|
|
*
|
|
* Return: Return ERR_PTR(-EINVAL) if mapping failed,
|
|
* otherwise the mapped kernel virtual address
|
|
**/
|
|
void *scp_mapping_dm_addr(struct mtk_scp *scp, u32 mem_addr)
|
|
{
|
|
void *ptr;
|
|
|
|
ptr = scp_da_to_va(scp->rproc, mem_addr, 0, NULL);
|
|
if (!ptr)
|
|
return ERR_PTR(-EINVAL);
|
|
|
|
return ptr;
|
|
}
|
|
EXPORT_SYMBOL_GPL(scp_mapping_dm_addr);
|
|
|
|
static int scp_map_memory_region(struct mtk_scp *scp)
|
|
{
|
|
int ret;
|
|
|
|
ret = of_reserved_mem_device_init(scp->dev);
|
|
|
|
/* reserved memory is optional. */
|
|
if (ret == -ENODEV) {
|
|
dev_info(scp->dev, "skipping reserved memory initialization.");
|
|
return 0;
|
|
}
|
|
|
|
if (ret) {
|
|
dev_err(scp->dev, "failed to assign memory-region: %d\n", ret);
|
|
return -ENOMEM;
|
|
}
|
|
|
|
/* Reserved SCP code size */
|
|
scp->dram_size = MAX_CODE_SIZE;
|
|
scp->cpu_addr = dma_alloc_coherent(scp->dev, scp->dram_size,
|
|
&scp->dma_addr, GFP_KERNEL);
|
|
if (!scp->cpu_addr)
|
|
return -ENOMEM;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void scp_unmap_memory_region(struct mtk_scp *scp)
|
|
{
|
|
if (scp->dram_size == 0)
|
|
return;
|
|
|
|
dma_free_coherent(scp->dev, scp->dram_size, scp->cpu_addr,
|
|
scp->dma_addr);
|
|
of_reserved_mem_device_release(scp->dev);
|
|
}
|
|
|
|
static int scp_register_ipi(struct platform_device *pdev, u32 id,
|
|
ipi_handler_t handler, void *priv)
|
|
{
|
|
struct mtk_scp *scp = platform_get_drvdata(pdev);
|
|
|
|
return scp_ipi_register(scp, id, handler, priv);
|
|
}
|
|
|
|
static void scp_unregister_ipi(struct platform_device *pdev, u32 id)
|
|
{
|
|
struct mtk_scp *scp = platform_get_drvdata(pdev);
|
|
|
|
scp_ipi_unregister(scp, id);
|
|
}
|
|
|
|
static int scp_send_ipi(struct platform_device *pdev, u32 id, void *buf,
|
|
unsigned int len, unsigned int wait)
|
|
{
|
|
struct mtk_scp *scp = platform_get_drvdata(pdev);
|
|
|
|
return scp_ipi_send(scp, id, buf, len, wait);
|
|
}
|
|
|
|
static struct mtk_rpmsg_info mtk_scp_rpmsg_info = {
|
|
.send_ipi = scp_send_ipi,
|
|
.register_ipi = scp_register_ipi,
|
|
.unregister_ipi = scp_unregister_ipi,
|
|
.ns_ipi_id = SCP_IPI_NS_SERVICE,
|
|
};
|
|
|
|
static void scp_add_rpmsg_subdev(struct mtk_scp *scp)
|
|
{
|
|
scp->rpmsg_subdev =
|
|
mtk_rpmsg_create_rproc_subdev(to_platform_device(scp->dev),
|
|
&mtk_scp_rpmsg_info);
|
|
if (scp->rpmsg_subdev)
|
|
rproc_add_subdev(scp->rproc, scp->rpmsg_subdev);
|
|
}
|
|
|
|
static void scp_remove_rpmsg_subdev(struct mtk_scp *scp)
|
|
{
|
|
if (scp->rpmsg_subdev) {
|
|
rproc_remove_subdev(scp->rproc, scp->rpmsg_subdev);
|
|
mtk_rpmsg_destroy_rproc_subdev(scp->rpmsg_subdev);
|
|
scp->rpmsg_subdev = NULL;
|
|
}
|
|
}
|
|
|
|
static int scp_probe(struct platform_device *pdev)
|
|
{
|
|
struct device *dev = &pdev->dev;
|
|
struct device_node *np = dev->of_node;
|
|
struct mtk_scp *scp;
|
|
struct rproc *rproc;
|
|
struct resource *res;
|
|
const char *fw_name = "scp.img";
|
|
int ret, i;
|
|
|
|
ret = rproc_of_parse_firmware(dev, 0, &fw_name);
|
|
if (ret < 0 && ret != -EINVAL)
|
|
return ret;
|
|
|
|
rproc = devm_rproc_alloc(dev, np->name, &scp_ops, fw_name, sizeof(*scp));
|
|
if (!rproc)
|
|
return dev_err_probe(dev, -ENOMEM, "unable to allocate remoteproc\n");
|
|
|
|
scp = (struct mtk_scp *)rproc->priv;
|
|
scp->rproc = rproc;
|
|
scp->dev = dev;
|
|
scp->data = of_device_get_match_data(dev);
|
|
platform_set_drvdata(pdev, scp);
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "sram");
|
|
scp->sram_base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(scp->sram_base))
|
|
return dev_err_probe(dev, PTR_ERR(scp->sram_base),
|
|
"Failed to parse and map sram memory\n");
|
|
|
|
scp->sram_size = resource_size(res);
|
|
scp->sram_phys = res->start;
|
|
|
|
/* l1tcm is an optional memory region */
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "l1tcm");
|
|
scp->l1tcm_base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(scp->l1tcm_base)) {
|
|
ret = PTR_ERR(scp->l1tcm_base);
|
|
if (ret != -EINVAL) {
|
|
return dev_err_probe(dev, ret, "Failed to map l1tcm memory\n");
|
|
}
|
|
} else {
|
|
scp->l1tcm_size = resource_size(res);
|
|
scp->l1tcm_phys = res->start;
|
|
}
|
|
|
|
scp->reg_base = devm_platform_ioremap_resource_byname(pdev, "cfg");
|
|
if (IS_ERR(scp->reg_base))
|
|
return dev_err_probe(dev, PTR_ERR(scp->reg_base),
|
|
"Failed to parse and map cfg memory\n");
|
|
|
|
ret = scp->data->scp_clk_get(scp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = scp_map_memory_region(scp);
|
|
if (ret)
|
|
return ret;
|
|
|
|
mutex_init(&scp->send_lock);
|
|
for (i = 0; i < SCP_IPI_MAX; i++)
|
|
mutex_init(&scp->ipi_desc[i].lock);
|
|
|
|
/* register SCP initialization IPI */
|
|
ret = scp_ipi_register(scp, SCP_IPI_INIT, scp_init_ipi_handler, scp);
|
|
if (ret) {
|
|
dev_err(dev, "Failed to register IPI_SCP_INIT\n");
|
|
goto release_dev_mem;
|
|
}
|
|
|
|
init_waitqueue_head(&scp->run.wq);
|
|
init_waitqueue_head(&scp->ack_wq);
|
|
|
|
scp_add_rpmsg_subdev(scp);
|
|
|
|
ret = devm_request_threaded_irq(dev, platform_get_irq(pdev, 0), NULL,
|
|
scp_irq_handler, IRQF_ONESHOT,
|
|
pdev->name, scp);
|
|
|
|
if (ret) {
|
|
dev_err(dev, "failed to request irq\n");
|
|
goto remove_subdev;
|
|
}
|
|
|
|
ret = rproc_add(rproc);
|
|
if (ret)
|
|
goto remove_subdev;
|
|
|
|
return 0;
|
|
|
|
remove_subdev:
|
|
scp_remove_rpmsg_subdev(scp);
|
|
scp_ipi_unregister(scp, SCP_IPI_INIT);
|
|
release_dev_mem:
|
|
scp_unmap_memory_region(scp);
|
|
for (i = 0; i < SCP_IPI_MAX; i++)
|
|
mutex_destroy(&scp->ipi_desc[i].lock);
|
|
mutex_destroy(&scp->send_lock);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int scp_remove(struct platform_device *pdev)
|
|
{
|
|
struct mtk_scp *scp = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
rproc_del(scp->rproc);
|
|
scp_remove_rpmsg_subdev(scp);
|
|
scp_ipi_unregister(scp, SCP_IPI_INIT);
|
|
scp_unmap_memory_region(scp);
|
|
for (i = 0; i < SCP_IPI_MAX; i++)
|
|
mutex_destroy(&scp->ipi_desc[i].lock);
|
|
mutex_destroy(&scp->send_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct mtk_scp_of_data mt8183_of_data = {
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.scp_clk_get = mt8183_scp_clk_get,
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.scp_before_load = mt8183_scp_before_load,
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.scp_irq_handler = mt8183_scp_irq_handler,
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.scp_reset_assert = mt8183_scp_reset_assert,
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.scp_reset_deassert = mt8183_scp_reset_deassert,
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.scp_stop = mt8183_scp_stop,
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.scp_da_to_va = mt8183_scp_da_to_va,
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.host_to_scp_reg = MT8183_HOST_TO_SCP,
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.host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
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.ipi_buf_offset = 0x7bdb0,
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};
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static const struct mtk_scp_of_data mt8186_of_data = {
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.scp_clk_get = mt8195_scp_clk_get,
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.scp_before_load = mt8186_scp_before_load,
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.scp_irq_handler = mt8183_scp_irq_handler,
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.scp_reset_assert = mt8183_scp_reset_assert,
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.scp_reset_deassert = mt8183_scp_reset_deassert,
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.scp_stop = mt8183_scp_stop,
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.scp_da_to_va = mt8183_scp_da_to_va,
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.host_to_scp_reg = MT8183_HOST_TO_SCP,
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.host_to_scp_int_bit = MT8183_HOST_IPC_INT_BIT,
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.ipi_buf_offset = 0x3bdb0,
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};
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static const struct mtk_scp_of_data mt8188_of_data = {
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.scp_clk_get = mt8195_scp_clk_get,
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.scp_before_load = mt8192_scp_before_load,
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.scp_irq_handler = mt8192_scp_irq_handler,
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.scp_reset_assert = mt8192_scp_reset_assert,
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.scp_reset_deassert = mt8192_scp_reset_deassert,
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.scp_stop = mt8192_scp_stop,
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.scp_da_to_va = mt8192_scp_da_to_va,
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.host_to_scp_reg = MT8192_GIPC_IN_SET,
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.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
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};
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static const struct mtk_scp_of_data mt8192_of_data = {
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.scp_clk_get = mt8192_scp_clk_get,
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.scp_before_load = mt8192_scp_before_load,
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.scp_irq_handler = mt8192_scp_irq_handler,
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.scp_reset_assert = mt8192_scp_reset_assert,
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.scp_reset_deassert = mt8192_scp_reset_deassert,
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.scp_stop = mt8192_scp_stop,
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.scp_da_to_va = mt8192_scp_da_to_va,
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.host_to_scp_reg = MT8192_GIPC_IN_SET,
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.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
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};
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static const struct mtk_scp_of_data mt8195_of_data = {
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.scp_clk_get = mt8195_scp_clk_get,
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.scp_before_load = mt8195_scp_before_load,
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.scp_irq_handler = mt8192_scp_irq_handler,
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.scp_reset_assert = mt8192_scp_reset_assert,
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.scp_reset_deassert = mt8192_scp_reset_deassert,
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.scp_stop = mt8195_scp_stop,
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.scp_da_to_va = mt8192_scp_da_to_va,
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.host_to_scp_reg = MT8192_GIPC_IN_SET,
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.host_to_scp_int_bit = MT8192_HOST_IPC_INT_BIT,
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};
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static const struct of_device_id mtk_scp_of_match[] = {
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{ .compatible = "mediatek,mt8183-scp", .data = &mt8183_of_data },
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{ .compatible = "mediatek,mt8186-scp", .data = &mt8186_of_data },
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{ .compatible = "mediatek,mt8188-scp", .data = &mt8188_of_data },
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{ .compatible = "mediatek,mt8192-scp", .data = &mt8192_of_data },
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{ .compatible = "mediatek,mt8195-scp", .data = &mt8195_of_data },
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{},
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};
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MODULE_DEVICE_TABLE(of, mtk_scp_of_match);
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static struct platform_driver mtk_scp_driver = {
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.probe = scp_probe,
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.remove = scp_remove,
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.driver = {
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.name = "mtk-scp",
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.of_match_table = mtk_scp_of_match,
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},
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};
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module_platform_driver(mtk_scp_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("MediaTek SCP control driver");
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