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linux/drivers/clk
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Claudiu Beznea 120d5d8b46 clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz 
Since CPU PLL feeds both CPU clock and MCK0, MCK0 cannot go higher
than 200MHz and MCK0 maximum prescaller is 5 limit the CPU PLL at
1GHz to avoid MCK0 overclocking while CPU PLL is changed by DVFS.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1605800597-16720-10-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2020-12-19 11:50:56 -08:00
..
actions
clk: actions: Add Actions S500 SoC Reset Management Unit support
2020-07-21 01:50:47 -07:00
analogbits
treewide: Add SPDX license identifier - Makefile/Kconfig
2019-05-21 10:50:46 +02:00
at91
clk: at91: sama7g5: do not allow cpu pll to go higher than 1GHz
2020-12-19 11:50:56 -08:00
axis
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
axs10x
clk: axs10x: use devm_platform_ioremap_resource() to simplify code
2019-10-16 16:17:50 -07:00
baikal-t1
clk: baikal-t1: Mark Ethernet PLL as critical
2020-10-13 19:48:34 -07:00
bcm
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
berlin
treewide: Add SPDX license identifier - Makefile/Kconfig
2019-05-21 10:50:46 +02:00
davinci
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
h8300
treewide: Add SPDX license identifier - Makefile/Kconfig
2019-05-21 10:50:46 +02:00
hisilicon
Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next
2019-11-27 08:14:17 -08:00
imgtec
treewide: replace '---help---' in Kconfig files with 'help'
2020-06-14 01:57:21 +09:00
imx
ARM: SoC platform updates
2020-10-24 10:33:08 -07:00
ingenic
clk: ingenic: Respect CLK_SET_RATE_PARENT in .round_rate
2020-10-13 20:04:50 -07:00
keystone
clk: keystone: sci-clk: add 10% slack to set_rate
2020-09-22 12:58:52 -07:00
loongson1
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
mediatek
Merge branches 'clk-simplify', 'clk-ti', 'clk-tegra', 'clk-rockchip' and 'clk-mediatek' into clk-next
2020-10-20 11:46:47 -07:00
meson
Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-next
2020-10-20 11:47:02 -07:00
microchip
clk: let init callback return an error code
2019-12-23 18:53:13 -08:00
mmp
Merge branches 'clk-semicolon', 'clk-axi-clkgen', 'clk-qoriq', 'clk-baikal', 'clk-const' and 'clk-mmp2' into clk-next
2020-10-20 11:47:02 -07:00
mvebu
clk: mvebu: ap80x-cpu: use semicolons rather than commas to separate statements
2020-10-13 17:43:05 -07:00
mxs
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
2019-05-30 11:26:37 -07:00
nxp
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 159
2019-05-30 11:26:37 -07:00
pistachio
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422
2019-06-05 17:37:15 +02:00
pxa
clk: pxa: Constify static struct clk_ops
2020-10-13 19:49:11 -07:00
qcom
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
renesas
clk: renesas: rcar-gen3: Update description for RZ/G2
2020-09-17 15:32:25 +02:00
rockchip
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
samsung
ARM: SoC platform updates
2020-10-24 10:33:08 -07:00
sifive
clk: sifive: allocate sufficient memory for struct __prci_data
2020-06-25 15:04:13 -07:00
sirf
clk: clk-prima2: fix return value check in prima2_clk_init()
2020-10-13 19:54:30 -07:00
socfpga
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
spear
clk: spear: Remove uninitialized_var() usage
2020-07-16 12:32:26 -07:00
sprd
This time around we have 4 lines of diff in the core framework, removing a
2020-06-10 11:42:19 -07:00
st
clk: st: Remove uninitialized_var() usage
2020-07-16 12:32:25 -07:00
sunxi
clk: sunxi: Fix incorrect usage of round_down()
2020-04-14 09:21:05 +02:00
sunxi-ng
clk: sunxi-ng: sun8i: r40: Use sigma delta modulation for audio PLL
2020-08-25 16:42:55 +02:00
tegra
This pull request contains zero diff to the core framework. It is a collection
2020-10-22 12:53:28 -07:00
ti
clk: ti: dra7: add missing clkctrl register for SHA2 instance
2020-09-22 13:00:07 -07:00
uniphier
clk: uniphier: use semicolons rather than commas to separate statements
2020-10-13 17:43:03 -07:00
ux500
clk: ux500: Fix up the SGA clock for some variants
2020-01-04 23:27:15 -08:00
versatile
clk: versatile: Add of_node_put() before return statement
2020-09-10 00:57:42 -07:00
x86
More ACPI updates for 5.9-rc1
2020-08-15 08:18:22 -07:00
zte
clk: zx296718: Don't reference clk_init_data after registration
2019-08-16 10:20:15 -07:00
zynq
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 401
2019-06-05 17:37:13 +02:00
zynqmp
This time around we have 4 lines of diff in the core framework, removing a
2020-06-10 11:42:19 -07:00
clk-asm9260.c
clk: asm9260: fix __clk_hw_register_fixed_rate_with_accuracy typo
2020-04-13 12:20:06 -07:00
clk-aspeed.c
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
2019-11-26 10:02:48 -08:00
clk-aspeed.h
clk: aspeed: Move structures to header
2019-09-06 15:17:02 -07:00
clk-ast2600.c
clk: AST2600: Add mux for EMMC clock
2020-07-11 09:15:33 -07:00
clk-axi-clkgen.c
clk: axi-clkgen: Set power bits for fractional mode
2020-10-13 19:44:40 -07:00
clk-axm5516.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
clk-bd718x7.c
clk: bd718x7: Support ROHM BD71828 clk block
2020-01-24 07:22:47 +00:00
clk-bm1880.c
clk: bm1800: Remove set but not used variable 'fref'
2019-12-24 00:10:33 -08:00
clk-bulk.c
clk: Make clk_bulk_get_all() return a valid "id"
2019-09-17 13:26:31 -07:00
clk-cdce706.c
Replace HTTP links with HTTPS ones: Common CLK framework
2020-07-10 17:15:34 -07:00
clk-cdce925.c
clk: clk-cdce925: Add regulator support
2019-09-06 10:31:16 -07:00
clk-clps711x.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-composite.c
clk: composite: Export clk_hw_register_composite()
2020-08-22 12:38:06 +08:00
clk-conf.c
clk: Tag clk core files with SPDX
2018-12-11 09:57:47 -08:00
clk-cs2000-cp.c
…
clk-devres.c
clk: Add devm_clk_bulk_get_optional() function
2019-06-25 14:28:01 -07:00
clk-divider.c
clk: divider: Add support for specifying parents via DT/pointers
2020-01-07 23:08:02 -08:00
clk-efm32gg.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
clk-fixed-factor.c
clk: fixed: add missing kerneldoc
2020-09-22 12:44:14 -07:00
clk-fixed-mmio.c
clk: Remove io.h from clk-provider.h
2019-05-15 13:21:37 -07:00
clk-fixed-rate.c
clk: fixed: add missing kerneldoc
2020-09-22 12:44:14 -07:00
clk-fractional-divider.c
clk: Remove io.h from clk-provider.h
2019-05-15 13:21:37 -07:00
clk-fsl-sai.c
clk: fsl-sai: new driver
2020-01-28 13:26:48 -08:00
clk-gate.c
treewide: Remove uninitialized_var() usage
2020-07-16 12:35:15 -07:00
clk-gemini.c
…
clk-gpio.c
Replace HTTP links with HTTPS ones: Common CLK framework
2020-07-10 17:15:34 -07:00
clk-hi655x.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 288
2019-06-05 17:36:37 +02:00
clk-highbank.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
2019-05-30 11:29:52 -07:00
clk-hsdk-pll.c
CLK: HSDK: CGU: add support for 148.5MHz clock
2020-05-28 21:06:39 -07:00
clk-lochnagar.c
clk: lochnagar: Don't reference clk_init_data after registration
2019-08-16 10:20:07 -07:00
clk-max9485.c
…
clk-max77686.c
clk: clk-max77686: Clean clkdev lookup leak and use devm
2019-02-06 10:35:03 -08:00
clk-milbeaut.c
clk: milbeaut: Don't reference clk_init_data after registration
2019-08-16 10:20:15 -07:00
clk-moxart.c
…
clk-multiplier.c
clk: Remove io.h from clk-provider.h
2019-05-15 13:21:37 -07:00
clk-mux.c
clk: mux: Add support for specifying parents via DT/pointers
2020-01-06 23:10:05 -08:00
clk-nomadik.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194
2019-05-30 11:29:22 -07:00
clk-npcm7xx.c
This time it looks like a quieter release cycle in the clk tree. I guess that's
2018-10-31 11:08:30 -07:00
clk-nspire.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
clk-oxnas.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
2019-05-30 11:29:52 -07:00
clk-palmas.c
clk: palmas: constify clk_ops structure
2018-11-06 09:41:44 -08:00
clk-plldig.c
clk: ls1028a: fix a dereference of pointer 'parent' before a null check
2020-02-03 23:03:49 -08:00
clk-pwm.c
clk: pwm: Use 64-bit division function
2020-06-17 20:42:10 +02:00
clk-qoriq.c
clk: qoriq: modify MAX_PLL_DIV to 32
2020-10-13 19:48:09 -07:00
clk-rk808.c
- Core Frameworks
2019-07-15 20:18:40 -07:00
clk-s2mps11.c
clk: s2mps11: initialize driver via module_platform_driver
2020-09-22 12:30:52 -07:00
clk-scmi.c
clk: scmi: Fix min and max rate when registering clocks with discrete rates
2020-07-13 09:40:21 +01:00
clk-scpi.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
2019-05-30 11:29:52 -07:00
clk-si514.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
2019-05-30 11:26:37 -07:00
clk-si544.c
clk: clk-si544: Implement small frequency change support
2019-06-27 13:45:38 -07:00
clk-si570.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157
2019-05-30 11:26:37 -07:00
clk-si5341.c
clk: si5341: drop unused 'err' variable
2020-09-22 12:44:41 -07:00
clk-si5351.c
Replace HTTP links with HTTPS ones: Common CLK framework
2020-07-10 17:15:34 -07:00
clk-si5351.h
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-sparx5.c
clk: sparx5: Add Sparx5 SoC DPLL clock driver
2020-07-28 18:17:56 -07:00
clk-stm32f4.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201
2019-05-30 11:29:52 -07:00
clk-stm32h7.c
clk: Convert to using %pOFn instead of device_node.name
2018-08-30 09:50:20 -07:00
clk-stm32mp1.c
clk: stm32mp1: Add ddrperfm clock
2019-04-29 11:13:23 -07:00
clk-tango4.c
clk: Convert to using %pOFn instead of device_node.name
2018-08-30 09:50:20 -07:00
clk-twl6040.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 336
2019-06-05 17:37:07 +02:00
clk-u300.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 194
2019-05-30 11:29:22 -07:00
clk-versaclock5.c
clk: vc5: use a dedicated struct to describe the output drivers
2020-07-23 15:34:21 -07:00
clk-vt8500.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
2019-06-05 17:36:37 +02:00
clk-wm831x.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
2019-05-30 11:26:32 -07:00
clk-xgene.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
2019-05-30 11:26:35 -07:00
clk.c
treewide: Convert macro and uses of __section(foo) to __section("foo")
2020-10-25 14:51:49 -07:00
clk.h
clk: consoldiate the __clk_get_hw() declarations
2019-07-12 11:00:14 -07:00
clkdev.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
2019-06-19 17:09:55 +02:00
Kconfig
Merge branches 'clk-ingenic', 'clk-at91', 'clk-kconfig', 'clk-imx', 'clk-qcom', 'clk-prima2' and 'clk-bcm' into clk-next
2020-10-20 11:47:07 -07:00
Makefile
clk: sparx5: Add Sparx5 SoC DPLL clock driver
2020-07-28 18:17:56 -07:00