615927f1a4
Adding a DFL (Device Feature List) device driver of ToD device for Intel FPGA cards. The Intel FPGA Time of Day(ToD) IP within the FPGA DFL bus is exposed as PTP Hardware clock(PHC) device to the Linux PTP stack to synchronize the system clock to its ToD information using phc2sys utility of the Linux PTP stack. The DFL is a hardware List within FPGA, which defines a linked list of feature headers within the device MMIO space to provide an extensible way of adding subdevice features. Signed-off-by: Raghavendra Khadatare <raghavendrax.anand.khadatare@intel.com> Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230328142455.481146-1-tianfei.zhang@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
22 lines
874 B
Makefile
22 lines
874 B
Makefile
# SPDX-License-Identifier: GPL-2.0
|
|
#
|
|
# Makefile for PTP 1588 clock support.
|
|
#
|
|
|
|
ptp-y := ptp_clock.o ptp_chardev.o ptp_sysfs.o ptp_vclock.o
|
|
ptp_kvm-$(CONFIG_X86) := ptp_kvm_x86.o ptp_kvm_common.o
|
|
ptp_kvm-$(CONFIG_HAVE_ARM_SMCCC) := ptp_kvm_arm.o ptp_kvm_common.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK) += ptp.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_DTE) += ptp_dte.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_INES) += ptp_ines.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_PCH) += ptp_pch.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_KVM) += ptp_kvm.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_QORIQ) += ptp-qoriq.o
|
|
ptp-qoriq-y += ptp_qoriq.o
|
|
ptp-qoriq-$(CONFIG_DEBUG_FS) += ptp_qoriq_debugfs.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_IDTCM) += ptp_clockmatrix.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_IDT82P33) += ptp_idt82p33.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_VMW) += ptp_vmw.o
|
|
obj-$(CONFIG_PTP_1588_CLOCK_OCP) += ptp_ocp.o
|
|
obj-$(CONFIG_PTP_DFL_TOD) += ptp_dfl_tod.o
|