ad253b3dd7
The Rockchip rk3066 timers have a different register layout then rk3288 with only a 32 vs 64 bits timer channel. The timers in rk3066a.dtsi have "snps,dw-apb-timer" as compatible string, so remove the "rockchip,rk3066-timer" from rockchip,rk-timer.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210824095637.2547-1-jbx6244@gmail.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
64 lines
1.4 KiB
YAML
64 lines
1.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Rockchip Timer Device Tree Bindings
|
|
|
|
maintainers:
|
|
- Daniel Lezcano <daniel.lezcano@linaro.org>
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- const: rockchip,rk3288-timer
|
|
- const: rockchip,rk3399-timer
|
|
- items:
|
|
- enum:
|
|
- rockchip,rv1108-timer
|
|
- rockchip,rk3036-timer
|
|
- rockchip,rk3188-timer
|
|
- rockchip,rk3228-timer
|
|
- rockchip,rk3229-timer
|
|
- rockchip,rk3288-timer
|
|
- rockchip,rk3368-timer
|
|
- rockchip,px30-timer
|
|
- const: rockchip,rk3288-timer
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
minItems: 2
|
|
maxItems: 2
|
|
|
|
clock-names:
|
|
items:
|
|
- const: pclk
|
|
- const: timer
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
- clock-names
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
#include <dt-bindings/clock/rk3288-cru.h>
|
|
|
|
timer: timer@ff810000 {
|
|
compatible = "rockchip,rk3288-timer";
|
|
reg = <0xff810000 0x20>;
|
|
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
|
|
clocks = <&cru PCLK_TIMER>, <&xin24m>;
|
|
clock-names = "pclk", "timer";
|
|
};
|