6fdc6e23a7
This doesn't yet do anything in the tools, but make it explicit so we can check either 'unevaluatedProperties' or 'additionalProperties' is present in schemas. 'unevaluatedProperties' is appropriate when including another schema (via '$ref') and all possible properties and/or child nodes are not explicitly listed in the schema with the '$ref'. This is in preparation to add a meta-schema to check for missing 'unevaluatedProperties' or 'additionalProperties'. This has been a constant source of review issues. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Wolfram Sang <wsa@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-By: Vinod Koul <vkoul@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Link: https://lore.kernel.org/r/20201005183830.486085-2-robh@kernel.org Signed-off-by: Rob Herring <robh@kernel.org>
135 lines
3.7 KiB
YAML
135 lines
3.7 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/cdns,sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence SD/SDIO/eMMC Host Controller (SD4HC)
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maintainers:
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- Masahiro Yamada <yamada.masahiro@socionext.com>
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- Piotr Sroka <piotrs@cadence.com>
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allOf:
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- $ref: mmc-controller.yaml
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properties:
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compatible:
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items:
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- enum:
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- socionext,uniphier-sd4hc
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- const: cdns,sd4hc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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# PHY DLL input delays:
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# They are used to delay the data valid window, and align the window to
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# sampling clock. The delay starts from 5ns (for delay parameter equal to 0)
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# and it is increased by 2.5ns in each step.
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cdns,phy-input-delay-sd-highspeed:
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description: Value of the delay in the input path for SD high-speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-legacy:
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description: Value of the delay in the input path for legacy timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr12:
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description: Value of the delay in the input path for SD UHS SDR12 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr25:
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description: Value of the delay in the input path for SD UHS SDR25 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-sdr50:
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description: Value of the delay in the input path for SD UHS SDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-sd-uhs-ddr50:
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description: Value of the delay in the input path for SD UHS DDR50 timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-mmc-highspeed:
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description: Value of the delay in the input path for MMC high-speed timing
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-input-delay-mmc-ddr:
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description: Value of the delay in the input path for eMMC high-speed DDR timing
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# PHY DLL clock delays:
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# Each delay property represents the fraction of the clock period.
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# The approximate delay value will be
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# (<delay property value>/128)*sdmclk_clock_period.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x1f
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cdns,phy-dll-delay-sdclk:
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description: |
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Value of the delay introduced on the sdclk output for all modes except
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HS200, HS400 and HS400_ES.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x7f
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cdns,phy-dll-delay-sdclk-hsmmc:
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description: |
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Value of the delay introduced on the sdclk output for HS200, HS400 and
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HS400_ES speed modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x7f
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cdns,phy-dll-delay-strobe:
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description: |
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Value of the delay introduced on the dat_strobe input used in
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HS400 / HS400_ES speed modes.
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$ref: "/schemas/types.yaml#/definitions/uint32"
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minimum: 0
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maximum: 0x7f
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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emmc: mmc@5a000000 {
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compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc";
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reg = <0x5a000000 0x400>;
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interrupts = <0 78 4>;
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clocks = <&clk 4>;
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bus-width = <8>;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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cdns,phy-dll-delay-sdclk = <0>;
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};
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