Wei Huang 3b9c723ed7 KVM: SVM: Add support for SVM instruction address check change ...

New AMD CPUs have a change that checks #VMEXIT intercept on special SVM
instructions before checking their EAX against reserved memory region.
This change is indicated by CPUID_0x8000000A_EDX[28]. If it is 1, #VMEXIT
is triggered before #GP. KVM doesn't need to intercept and emulate #GP
faults as #GP is supposed to be triggered.

Co-developed-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Bandan Das <bsd@redhat.com>
Signed-off-by: Wei Huang <wei.huang2@amd.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Message-Id: <20210126081831.570253-4-wei.huang2@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

2021-02-04 05:27:28 -05:00

..

asm

KVM: SVM: Add support for SVM instruction address check change

2021-02-04 05:27:28 -05:00

uapi/asm

KVM: VMX: Enable bus lock VM exit

2021-02-04 05:27:21 -05:00