linux/arch/arm64/boot/dts/qcom/sc7280-herobrine-lte-sku.dtsi
Sibi Sankar a63a420d05 arm64: dts: qcom: sc7280: Add a carveout for modem metadata
Add a new carveout for modem metadata on SC7280 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230117085840.32356-12-quic_sibis@quicinc.com
2023-01-18 21:35:25 -06:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Herobrine dts fragment for LTE SKUs
*
* Copyright 2022 Google LLC.
*/
/* Modem setup is different on Chrome setups than typical Qualcomm setup */
/ {
reserved-memory {
mpss_mem: memory@8b800000 {
reg = <0x0 0x8b800000 0x0 0xf600000>;
no-map;
};
mba_mem: memory@9c700000 {
reg = <0x0 0x9c700000 0x0 0x200000>;
no-map;
};
mdata_mem: mpss-metadata {
alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>;
size = <0x0 0x4000>;
no-map;
};
};
};
&ipa {
qcom,gsi-loader = "modem";
status = "okay";
};
&remoteproc_mpss {
compatible = "qcom,sc7280-mss-pil";
clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
<&gcc GCC_MSS_OFFLINE_AXI_CLK>,
<&gcc GCC_MSS_SNOC_AXI_CLK>,
<&rpmhcc RPMH_PKA_CLK>,
<&rpmhcc RPMH_CXO_CLK>;
clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
memory-region = <&mba_mem>, <&mpss_mem>, <&mdata_mem>;
firmware-name = "qcom/sc7280-herobrine/modem/mba.mbn",
"qcom/sc7280-herobrine/modem/qdsp6sw.mbn";
resets = <&aoss_reset AOSS_CC_MSS_RESTART>,
<&pdc_reset PDC_MODEM_SYNC_RESET>;
reset-names = "mss_restart", "pdc_reset";
qcom,halt-regs = <&tcsr_1 0x3000 0x5000 0x8000 0x13000>;
qcom,ext-regs = <&tcsr_2 0x10000 0x10004 &tcsr_1 0x6004 0x6008>;
qcom,qaccept-regs = <&tcsr_1 0x3030 0x3040 0x3020>;
status = "okay";
};
/* Increase the size from 2.5MB to 8MB */
&rmtfs_mem {
reg = <0x0 0x9c900000 0x0 0x800000>;
};