12a18bb74f
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only summary interrupt. SM6350 is different because downstream and upstream DTS have nine of the interrupts. Allow such variation. Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221230135645.56401-7-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
133 lines
4.5 KiB
YAML
133 lines
4.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. IPQ6018 TLMM block
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maintainers:
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- Bjorn Andersson <andersson@kernel.org>
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description:
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Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.
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properties:
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compatible:
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const: qcom,ipq6018-pinctrl
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-controller: true
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"#interrupt-cells": true
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gpio-controller: true
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"#gpio-cells": true
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gpio-ranges: true
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patternProperties:
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"-state$":
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oneOf:
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- $ref: "#/$defs/qcom-ipq6018-tlmm-state"
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- patternProperties:
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"-pins$":
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$ref: "#/$defs/qcom-ipq6018-tlmm-state"
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additionalProperties: false
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$defs:
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qcom-ipq6018-tlmm-state:
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description:
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Pinctrl node's client devices use subnodes for desired pin configuration.
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Client device subnodes use below standard properties.
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$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
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properties:
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pins:
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description:
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List of gpio pins affected by the properties specified in this
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subnode.
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items:
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oneOf:
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- pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
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- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
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sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
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qdsd_data3 ]
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minItems: 1
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maxItems: 16
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function:
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description:
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Specify the alternative function to be configured for the specified
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pins.
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enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
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atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
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atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
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atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,
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blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,
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blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
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blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
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blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
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blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
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cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
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cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
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dmic0_clk, dmic0_data, dsi_rst, ebi0_wrcdc, euro_us, ext_lpass,
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flash_strobe, gcc_gp1_clk_a, gcc_gp1_clk_b, gcc_gp2_clk_a,
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gcc_gp2_clk_b, gcc_gp3_clk_a, gcc_gp3_clk_b, gpio, gsm0_tx0,
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gsm0_tx1, gsm1_tx0, gsm1_tx1, gyro_accl, kpsns0, kpsns1, kpsns2,
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ldo_en, ldo_update, mag_int, mdp_vsync, modem_tsync, m_voc,
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nav_pps, nav_tsync, pa_indicator, pbs0, pbs1, pbs2, pri_mi2s,
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pri_mi2s_ws, prng_rosc, pwr_crypto_enabled_a, pwr_crypto_enabled_b,
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pwr_modem_enabled_a, pwr_modem_enabled_b, pwr_nav_enabled_a,
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pwr_nav_enabled_b, qdss_ctitrig_in_a0, qdss_ctitrig_in_a1,
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qdss_ctitrig_in_b0, qdss_ctitrig_in_b1, qdss_ctitrig_out_a0,
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qdss_ctitrig_out_a1, qdss_ctitrig_out_b0, qdss_ctitrig_out_b1,
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qdss_traceclk_a, qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b,
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qdss_tracedata_a, qdss_tracedata_b, qpic_pad, reset_n, sd_card,
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sd_write, sec_mi2s, smb_int, ssbi_wtr0, ssbi_wtr1, uim1, uim2,
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uim3, uim_batt, wcss_bt, wcss_fm, wcss_wlan, webcam1_rst ]
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bias-pull-down: true
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bias-pull-up: true
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bias-disable: true
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drive-strength: true
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output-high: true
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output-low: true
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required:
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- pins
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additionalProperties: false
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allOf:
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- $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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tlmm: pinctrl@1000000 {
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compatible = "qcom,ipq6018-pinctrl";
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reg = <0x01000000 0x300000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&tlmm 0 0 80>;
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serial3-state {
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pins = "gpio44", "gpio45";
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function = "blsp2_uart";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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