There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOp8cACgkQmmx57+YA GNk33hAAn/mY+QDyj8sUwtY4AAVtut2QgyBm7NBWLgiYDQx52yBwP7rUxeKyDqZF q6LK5z3NA7NN5REpfn6WKBEFo6wkzTzg4Gev/h+9hwLyozch8vl4etBfZGak4A7m cLCONZdw4FMCQ10oLq+ib/WJeJv2W700307OkJ3dN73qdbWLRF1hoyG+uMTHuEqL If755IR+EYhxYz8CfJhCYb2BcqhRq047n3sEqolZpFtz5oHUW2dADASgWpV+3yNc ql8cH0f5OTKbFS1lM4k7cWbMW2vHWx7jZnXZDyMfy3EE5SOb4V/s9JFJSS1pAfPQ OWuq194LT+SIXTTT3DQ+lSNcMhlkyeXQ0JQE1wAAp0vov4V8vHGvEGk0MCku5QHp zKKONPfcn9aoWtsh4GaCvt0cP0m7lKyjxJvNSjBy2C9dVW8t4UlIVZr+V8hR2Ufp SpCCzMbttrcUK6rHzQmWsR563mhfszzuzDfZi4RK2aFLJKhFi5hEQF2tDxLq8Y09 vIY/OkRpSwahgbiyj/zhKrJtnhFHh1m6wZJG+Sk9lTJikEhaRinriy0lgu08xssG krBHPOVhNY11rqlzosBU39JOya1/J2iTxjo7ccNmGfO4MDanE+Cl41a5wSNjciw1 ihi2zAUBClGg0TnQ+HJylFPS3ZFyGEtbYH/d6td25DtwaaIsaxU= =LsM7 -----END PGP SIGNATURE----- Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
151 lines
3.5 KiB
Plaintext
151 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright (C) 2016, 2020 PHYTEC Messtechnik
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* Author: Christian Hemp <c.hemp@phytec.de>
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* Author: Stefan Riedmueller <s.riedmueller@phytec.de>
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*/
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/ {
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backlight_lcd: backlight-lcd {
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compatible = "pwm-backlight";
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <5>;
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power-supply = <®_backlight_en>;
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pwms = <&pwm3 0 5000000 0>;
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status = "disabled";
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};
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lcd_panel: lcd-panel {
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compatible = "edt,etm0700g0edh6";
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backlight = <&backlight_lcd>;
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status = "disabled";
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port {
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lcd_panel_in: endpoint {
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remote-endpoint = <&lcdif_parallel_out>;
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};
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};
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};
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reg_backlight_en: regulator-backlight-en {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight_en>;
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regulator-name = "backlight-lcd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&i2c1 {
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edt_ft5406: touchscreen@38 {
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compatible = "edt,edt-ft5406";
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reg = <0x38>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_edt_ft5406>;
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interrupt-parent = <&gpio5>;
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interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
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wakeup-source;
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status = "disabled";
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};
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stmpe: touchscreen@44 {
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compatible = "st,stmpe811";
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reg = <0x44>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_stmpe>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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interrupt-parent = <&gpio5>;
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wakeup-source;
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status = "disabled";
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stmpe_touchscreen {
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compatible = "st,stmpe-ts";
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st,sample-time = <4>;
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st,mod-12b = <1>;
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st,ref-sel = <0>;
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st,adc-freq = <1>;
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st,ave-ctrl = <1>;
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st,touch-det-delay = <2>;
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st,settling = <2>;
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st,fraction-z = <7>;
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st,i-drive = <1>;
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touchscreen-inverted-x;
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touchscreen-inverted-y;
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};
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};
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};
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&lcdif {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcdif_dat>;
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status = "disabled";
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port {
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lcdif_parallel_out: endpoint {
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remote-endpoint = <&lcd_panel_in>;
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};
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};
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};
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&pwm3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm3>;
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status = "disabled";
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};
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&iomuxc {
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pinctrl_edt_ft5406: edtft5406grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x1b0b0
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>;
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};
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pinctrl_backlight_en: bachlightengrp {
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fsl,pins = <
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MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
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>;
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};
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pinctrl_lcdif_dat: lcdifdatgrp {
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fsl,pins = <
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MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x59
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MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x59
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MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x59
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MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x59
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MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x59
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MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x59
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MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x59
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MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x59
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MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x59
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MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x59
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MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x59
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MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x59
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MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x59
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MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x59
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MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x59
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MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x59
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MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x59
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MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x59
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MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x59
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MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x59
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MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x59
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MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x59
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>;
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};
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pinctrl_pwm3: pwm3grp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO04__PWM3_OUT 0x0b0b0
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>;
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};
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pinctrl_stmpe: stmpegrp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x17059
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>;
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};
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};
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