92eb4f62cb
Broxton DSP is mostly similar to Skylake one but with subtle differences like no Code Load DMA and uses HDA DMA for code loading, DSP D0 and D3 sequences are different. These changes are comprehended by adding different DSP power up and down handlers, and new loader ops and also adding prepare and trigger which HDA DSP DMA requires Signed-off-by: Jeeja KP <jeeja.kp@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: GuruprasadX Pawse <guruprasadx.pawse@intel.com> Signed-off-by: Kranthi G <gudishax.kranthikumar@intel.com> Signed-off-by: Dharageswari R <dharageswari.r@intel.com> Signed-off-by: Ramesh Babu <ramesh.babu@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
11 lines
306 B
Makefile
11 lines
306 B
Makefile
snd-soc-skl-objs := skl.o skl-pcm.o skl-nhlt.o skl-messages.o \
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skl-topology.o
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obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl.o
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# Skylake IPC Support
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snd-soc-skl-ipc-objs := skl-sst-ipc.o skl-sst-dsp.o skl-sst-cldma.o \
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skl-sst.o bxt-sst.o
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obj-$(CONFIG_SND_SOC_INTEL_SKYLAKE) += snd-soc-skl-ipc.o
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