1aa09b9379
The RAPL framework uses CPU hotplug locking to protect the rapl_packages
list and rp->lead_cpu to guarantee that
1. the RAPL package device is not unprobed and freed
2. the cached rp->lead_cpu is always valid
for operations like powercap sysfs accesses.
Current RAPL APIs assume being called from CPU hotplug callbacks which
hold the CPU hotplug lock, but TPMI RAPL driver invokes the APIs in the
driver's .probe() function without acquiring the CPU hotplug lock.
Fix the problem by providing both locked and lockless versions of RAPL
APIs.
Fixes: 9eef7f9da9
("powercap: intel_rapl: Introduce RAPL TPMI interface driver")
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Cc: 6.5+ <stable@vger.kernel.org> # 6.5+
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
227 lines
6.7 KiB
C
227 lines
6.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Intel Running Average Power Limit (RAPL) Driver via MSR interface
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* Copyright (c) 2019, Intel Corporation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/list.h>
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#include <linux/types.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/log2.h>
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#include <linux/bitmap.h>
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#include <linux/delay.h>
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#include <linux/sysfs.h>
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#include <linux/cpu.h>
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#include <linux/powercap.h>
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#include <linux/suspend.h>
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#include <linux/intel_rapl.h>
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#include <linux/processor.h>
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#include <linux/platform_device.h>
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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/* Local defines */
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#define MSR_PLATFORM_POWER_LIMIT 0x0000065C
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#define MSR_VR_CURRENT_CONFIG 0x00000601
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/* private data for RAPL MSR Interface */
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static struct rapl_if_priv *rapl_msr_priv;
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static struct rapl_if_priv rapl_msr_priv_intel = {
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.type = RAPL_IF_MSR,
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.reg_unit.msr = MSR_RAPL_POWER_UNIT,
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.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PKG_POWER_LIMIT,
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.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_PKG_ENERGY_STATUS,
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.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PERF].msr = MSR_PKG_PERF_STATUS,
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.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_INFO].msr = MSR_PKG_POWER_INFO,
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.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP0_POWER_LIMIT,
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.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP0_ENERGY_STATUS,
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.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP0_POLICY,
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.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PP1_POWER_LIMIT,
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.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_STATUS].msr = MSR_PP1_ENERGY_STATUS,
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.regs[RAPL_DOMAIN_PP1][RAPL_DOMAIN_REG_POLICY].msr = MSR_PP1_POLICY,
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.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_DRAM_POWER_LIMIT,
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.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_STATUS].msr = MSR_DRAM_ENERGY_STATUS,
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.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_PERF].msr = MSR_DRAM_PERF_STATUS,
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.regs[RAPL_DOMAIN_DRAM][RAPL_DOMAIN_REG_INFO].msr = MSR_DRAM_POWER_INFO,
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.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_LIMIT].msr = MSR_PLATFORM_POWER_LIMIT,
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.regs[RAPL_DOMAIN_PLATFORM][RAPL_DOMAIN_REG_STATUS].msr = MSR_PLATFORM_ENERGY_STATUS,
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.limits[RAPL_DOMAIN_PACKAGE] = BIT(POWER_LIMIT2),
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.limits[RAPL_DOMAIN_PLATFORM] = BIT(POWER_LIMIT2),
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};
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static struct rapl_if_priv rapl_msr_priv_amd = {
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.type = RAPL_IF_MSR,
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.reg_unit.msr = MSR_AMD_RAPL_POWER_UNIT,
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.regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_PKG_ENERGY_STATUS,
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.regs[RAPL_DOMAIN_PP0][RAPL_DOMAIN_REG_STATUS].msr = MSR_AMD_CORE_ENERGY_STATUS,
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};
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/* Handles CPU hotplug on multi-socket systems.
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* If a CPU goes online as the first CPU of the physical package
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* we add the RAPL package to the system. Similarly, when the last
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* CPU of the package is removed, we remove the RAPL package and its
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* associated domains. Cooling devices are handled accordingly at
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* per-domain level.
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*/
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static int rapl_cpu_online(unsigned int cpu)
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{
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struct rapl_package *rp;
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rp = rapl_find_package_domain_cpuslocked(cpu, rapl_msr_priv, true);
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if (!rp) {
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rp = rapl_add_package_cpuslocked(cpu, rapl_msr_priv, true);
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if (IS_ERR(rp))
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return PTR_ERR(rp);
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}
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cpumask_set_cpu(cpu, &rp->cpumask);
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return 0;
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}
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static int rapl_cpu_down_prep(unsigned int cpu)
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{
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struct rapl_package *rp;
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int lead_cpu;
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rp = rapl_find_package_domain_cpuslocked(cpu, rapl_msr_priv, true);
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if (!rp)
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return 0;
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cpumask_clear_cpu(cpu, &rp->cpumask);
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lead_cpu = cpumask_first(&rp->cpumask);
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if (lead_cpu >= nr_cpu_ids)
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rapl_remove_package_cpuslocked(rp);
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else if (rp->lead_cpu == cpu)
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rp->lead_cpu = lead_cpu;
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return 0;
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}
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static int rapl_msr_read_raw(int cpu, struct reg_action *ra)
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{
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if (rdmsrl_safe_on_cpu(cpu, ra->reg.msr, &ra->value)) {
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pr_debug("failed to read msr 0x%x on cpu %d\n", ra->reg.msr, cpu);
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return -EIO;
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}
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ra->value &= ra->mask;
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return 0;
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}
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static void rapl_msr_update_func(void *info)
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{
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struct reg_action *ra = info;
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u64 val;
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ra->err = rdmsrl_safe(ra->reg.msr, &val);
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if (ra->err)
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return;
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val &= ~ra->mask;
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val |= ra->value;
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ra->err = wrmsrl_safe(ra->reg.msr, val);
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}
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static int rapl_msr_write_raw(int cpu, struct reg_action *ra)
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{
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int ret;
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ret = smp_call_function_single(cpu, rapl_msr_update_func, ra, 1);
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if (WARN_ON_ONCE(ret))
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return ret;
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return ra->err;
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}
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/* List of verified CPUs. */
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static const struct x86_cpu_id pl4_support_ids[] = {
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X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE_L, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(ATOM_GRACEMONT, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(RAPTORLAKE_P, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE, NULL),
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X86_MATCH_INTEL_FAM6_MODEL(METEORLAKE_L, NULL),
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{}
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};
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static int rapl_msr_probe(struct platform_device *pdev)
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{
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const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids);
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int ret;
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switch (boot_cpu_data.x86_vendor) {
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case X86_VENDOR_INTEL:
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rapl_msr_priv = &rapl_msr_priv_intel;
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break;
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case X86_VENDOR_HYGON:
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case X86_VENDOR_AMD:
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rapl_msr_priv = &rapl_msr_priv_amd;
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break;
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default:
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pr_err("intel-rapl does not support CPU vendor %d\n", boot_cpu_data.x86_vendor);
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return -ENODEV;
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}
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rapl_msr_priv->read_raw = rapl_msr_read_raw;
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rapl_msr_priv->write_raw = rapl_msr_write_raw;
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if (id) {
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rapl_msr_priv->limits[RAPL_DOMAIN_PACKAGE] |= BIT(POWER_LIMIT4);
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rapl_msr_priv->regs[RAPL_DOMAIN_PACKAGE][RAPL_DOMAIN_REG_PL4].msr =
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MSR_VR_CURRENT_CONFIG;
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pr_info("PL4 support detected.\n");
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}
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rapl_msr_priv->control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
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if (IS_ERR(rapl_msr_priv->control_type)) {
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pr_debug("failed to register powercap control_type.\n");
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return PTR_ERR(rapl_msr_priv->control_type);
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}
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ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "powercap/rapl:online",
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rapl_cpu_online, rapl_cpu_down_prep);
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if (ret < 0)
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goto out;
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rapl_msr_priv->pcap_rapl_online = ret;
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return 0;
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out:
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if (ret)
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powercap_unregister_control_type(rapl_msr_priv->control_type);
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return ret;
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}
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static int rapl_msr_remove(struct platform_device *pdev)
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{
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cpuhp_remove_state(rapl_msr_priv->pcap_rapl_online);
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powercap_unregister_control_type(rapl_msr_priv->control_type);
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return 0;
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}
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static const struct platform_device_id rapl_msr_ids[] = {
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{ .name = "intel_rapl_msr", },
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{}
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};
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MODULE_DEVICE_TABLE(platform, rapl_msr_ids);
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static struct platform_driver intel_rapl_msr_driver = {
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.probe = rapl_msr_probe,
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.remove = rapl_msr_remove,
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.id_table = rapl_msr_ids,
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.driver = {
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.name = "intel_rapl_msr",
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},
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};
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module_platform_driver(intel_rapl_msr_driver);
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MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit) control via MSR interface");
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MODULE_AUTHOR("Zhang Rui <rui.zhang@intel.com>");
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MODULE_LICENSE("GPL v2");
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