77cff5926a
This patch changes the cpufreq-cpu0 driver to consider if a cpu needs cooling (with cpufreq). In case the cooling is needed, the cpu0 device tree node needs to be properly configured with cooling device properties. In case these properties are present,, the driver will load a cpufreq cooling device in the system. The cpufreq-cpu0 driver is not interested in determining how the system should be using the cooling device. The driver is responsible only of loading the cooling device. Describing how the cooling device will be used can be accomplished by setting up a thermal zone that references and is composed by the cpufreq cooling device. Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: cpufreq@vger.kernel.org Cc: linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Eduardo Valentin <eduardo.valentin@ti.com>
63 lines
1.4 KiB
Plaintext
63 lines
1.4 KiB
Plaintext
Generic CPU0 cpufreq driver
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It is a generic cpufreq driver for CPU0 frequency management. It
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supports both uniprocessor (UP) and symmetric multiprocessor (SMP)
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systems which share clock and voltage across all CPUs.
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Both required and optional properties listed below must be defined
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under node /cpus/cpu@0.
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Required properties:
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- operating-points: Refer to Documentation/devicetree/bindings/power/opp.txt
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for details
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Optional properties:
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- clock-latency: Specify the possible maximum transition latency for clock,
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in unit of nanoseconds.
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- voltage-tolerance: Specify the CPU voltage tolerance in percentage.
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- #cooling-cells:
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- cooling-min-level:
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- cooling-max-level:
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Please refer to Documentation/devicetree/bindings/thermal/thermal.txt.
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Examples:
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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reg = <0>;
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next-level-cache = <&L2>;
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operating-points = <
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/* kHz uV */
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792000 1100000
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396000 950000
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198000 850000
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>;
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clock-latency = <61036>; /* two CLK32 periods */
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#cooling-cells = <2>;
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cooling-min-level = <0>;
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cooling-max-level = <2>;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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reg = <1>;
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next-level-cache = <&L2>;
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};
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cpu@2 {
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compatible = "arm,cortex-a9";
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reg = <2>;
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next-level-cache = <&L2>;
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};
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cpu@3 {
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compatible = "arm,cortex-a9";
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reg = <3>;
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next-level-cache = <&L2>;
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};
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};
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