58390c8ce1
Including: - Convert to platform remove callback returning void - Extend changing default domain to normal group - Intel VT-d updates: - Remove VT-d virtual command interface and IOASID - Allow the VT-d driver to support non-PRI IOPF - Remove PASID supervisor request support - Various small and misc cleanups - ARM SMMU updates: - Device-tree binding updates: * Allow Qualcomm GPU SMMUs to accept relevant clock properties * Document Qualcomm 8550 SoC as implementing an MMU-500 * Favour new "qcom,smmu-500" binding for Adreno SMMUs - Fix S2CR quirk detection on non-architectural Qualcomm SMMU implementations - Acknowledge SMMUv3 PRI queue overflow when consuming events - Document (in a comment) why ATS is disabled for bypass streams - AMD IOMMU updates: - 5-level page-table support - NUMA awareness for memory allocations - Unisoc driver: Support for reattaching an existing domain - Rockchip driver: Add missing set_platform_dma_ops callback - Mediatek driver: Adjust the dma-ranges - Various other small fixes and cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmRONeAACgkQK/BELZcB GuPmpw/8C9ruxQ0JU5rcDBXQGvos4gMmxlbELMrBpbbiTtdb35xchpKfdhnECGIF k2SrrcF40R/S82SyzNU/eZtGKirtcXvGFraUFgu/QdCcnnqpRHs+IJMXX2NJP+it +0wO1uiInt3CN1ERcR4F31cDKiWjDG8bvQVE5LIyiy4KrIU5ld2G91Fkaa0R13Au 6H+/wKkcUC6OyaGE6wPx474xBkapT20vj5AIQuAWisXJJR0wbBon1sUTo/IRKsU+ IkNxH0W+1PNImJ+crAdf/nkOlyqoChY4ww6cm07LrOsBLIsX5bCqXfL4HvKthElD MEgk2SN5kfjfR5Vf29W4hZVM1CT8VbhO41I7OzaZ6X6RU2PXoldPKlgKtZGeSKn1 9bcMpSgB0BtbttvBevSkxTo5KHFozXS2DG3DFoMB3yFMme8Th0LrhBZ9oB7NIPNw ntMo4K75vviC6Vvzjy4Anj/+y+Zm3W6wDDP7F12O6WZLkK5s4hrSsHUm/MQnnKQP muJlG870RnSl73xUQZe3cuBxktXuJ3EHqqYIPE0npzvauu8hhWcis3opf2Y+U2s8 aBCCIgp5kTKqjHLh2e4lNCKZf1/b/dhxRcRBQhpAIb8YsjMlIJyM+G8Jz6K6gBga 5Ld+68UQ3oHJwoLV1HCFN8jbpQ9KZn1s9+h3yrYjRAcLNiFb3nU= =OvTo -----END PGP SIGNATURE----- Merge tag 'iommu-updates-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu updates from Joerg Roedel: - Convert to platform remove callback returning void - Extend changing default domain to normal group - Intel VT-d updates: - Remove VT-d virtual command interface and IOASID - Allow the VT-d driver to support non-PRI IOPF - Remove PASID supervisor request support - Various small and misc cleanups - ARM SMMU updates: - Device-tree binding updates: * Allow Qualcomm GPU SMMUs to accept relevant clock properties * Document Qualcomm 8550 SoC as implementing an MMU-500 * Favour new "qcom,smmu-500" binding for Adreno SMMUs - Fix S2CR quirk detection on non-architectural Qualcomm SMMU implementations - Acknowledge SMMUv3 PRI queue overflow when consuming events - Document (in a comment) why ATS is disabled for bypass streams - AMD IOMMU updates: - 5-level page-table support - NUMA awareness for memory allocations - Unisoc driver: Support for reattaching an existing domain - Rockchip driver: Add missing set_platform_dma_ops callback - Mediatek driver: Adjust the dma-ranges - Various other small fixes and cleanups * tag 'iommu-updates-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (82 commits) iommu: Remove iommu_group_get_by_id() iommu: Make iommu_release_device() static iommu/vt-d: Remove BUG_ON in dmar_insert_dev_scope() iommu/vt-d: Remove a useless BUG_ON(dev->is_virtfn) iommu/vt-d: Remove BUG_ON in map/unmap() iommu/vt-d: Remove BUG_ON when domain->pgd is NULL iommu/vt-d: Remove BUG_ON in handling iotlb cache invalidation iommu/vt-d: Remove BUG_ON on checking valid pfn range iommu/vt-d: Make size of operands same in bitwise operations iommu/vt-d: Remove PASID supervisor request support iommu/vt-d: Use non-privileged mode for all PASIDs iommu/vt-d: Remove extern from function prototypes iommu/vt-d: Do not use GFP_ATOMIC when not needed iommu/vt-d: Remove unnecessary checks in iopf disabling path iommu/vt-d: Move PRI handling to IOPF feature path iommu/vt-d: Move pfsid and ats_qdep calculation to device probe path iommu/vt-d: Move iopf code from SVA to IOPF enabling path iommu/vt-d: Allow SVA with device-specific IOPF dmaengine: idxd: Add enable/disable device IOPF feature arm64: dts: mt8186: Add dma-ranges for the parent "soc" node ...
221 lines
5.2 KiB
C
221 lines
5.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Helpers for IOMMU drivers implementing SVA
|
|
*/
|
|
#include <linux/mmu_context.h>
|
|
#include <linux/mutex.h>
|
|
#include <linux/sched/mm.h>
|
|
#include <linux/iommu.h>
|
|
|
|
#include "iommu-sva.h"
|
|
|
|
static DEFINE_MUTEX(iommu_sva_lock);
|
|
static DEFINE_IDA(iommu_global_pasid_ida);
|
|
|
|
/* Allocate a PASID for the mm within range (inclusive) */
|
|
static int iommu_sva_alloc_pasid(struct mm_struct *mm, ioasid_t min, ioasid_t max)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (min == IOMMU_PASID_INVALID ||
|
|
max == IOMMU_PASID_INVALID ||
|
|
min == 0 || max < min)
|
|
return -EINVAL;
|
|
|
|
if (!arch_pgtable_dma_compat(mm))
|
|
return -EBUSY;
|
|
|
|
mutex_lock(&iommu_sva_lock);
|
|
/* Is a PASID already associated with this mm? */
|
|
if (mm_valid_pasid(mm)) {
|
|
if (mm->pasid < min || mm->pasid > max)
|
|
ret = -EOVERFLOW;
|
|
goto out;
|
|
}
|
|
|
|
ret = ida_alloc_range(&iommu_global_pasid_ida, min, max, GFP_KERNEL);
|
|
if (ret < min)
|
|
goto out;
|
|
mm->pasid = ret;
|
|
ret = 0;
|
|
out:
|
|
mutex_unlock(&iommu_sva_lock);
|
|
return ret;
|
|
}
|
|
|
|
/**
|
|
* iommu_sva_bind_device() - Bind a process address space to a device
|
|
* @dev: the device
|
|
* @mm: the mm to bind, caller must hold a reference to mm_users
|
|
*
|
|
* Create a bond between device and address space, allowing the device to
|
|
* access the mm using the PASID returned by iommu_sva_get_pasid(). If a
|
|
* bond already exists between @device and @mm, an additional internal
|
|
* reference is taken. Caller must call iommu_sva_unbind_device()
|
|
* to release each reference.
|
|
*
|
|
* iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first, to
|
|
* initialize the required SVA features.
|
|
*
|
|
* On error, returns an ERR_PTR value.
|
|
*/
|
|
struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm)
|
|
{
|
|
struct iommu_domain *domain;
|
|
struct iommu_sva *handle;
|
|
ioasid_t max_pasids;
|
|
int ret;
|
|
|
|
max_pasids = dev->iommu->max_pasids;
|
|
if (!max_pasids)
|
|
return ERR_PTR(-EOPNOTSUPP);
|
|
|
|
/* Allocate mm->pasid if necessary. */
|
|
ret = iommu_sva_alloc_pasid(mm, 1, max_pasids - 1);
|
|
if (ret)
|
|
return ERR_PTR(ret);
|
|
|
|
handle = kzalloc(sizeof(*handle), GFP_KERNEL);
|
|
if (!handle)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
mutex_lock(&iommu_sva_lock);
|
|
/* Search for an existing domain. */
|
|
domain = iommu_get_domain_for_dev_pasid(dev, mm->pasid,
|
|
IOMMU_DOMAIN_SVA);
|
|
if (IS_ERR(domain)) {
|
|
ret = PTR_ERR(domain);
|
|
goto out_unlock;
|
|
}
|
|
|
|
if (domain) {
|
|
domain->users++;
|
|
goto out;
|
|
}
|
|
|
|
/* Allocate a new domain and set it on device pasid. */
|
|
domain = iommu_sva_domain_alloc(dev, mm);
|
|
if (!domain) {
|
|
ret = -ENOMEM;
|
|
goto out_unlock;
|
|
}
|
|
|
|
ret = iommu_attach_device_pasid(domain, dev, mm->pasid);
|
|
if (ret)
|
|
goto out_free_domain;
|
|
domain->users = 1;
|
|
out:
|
|
mutex_unlock(&iommu_sva_lock);
|
|
handle->dev = dev;
|
|
handle->domain = domain;
|
|
|
|
return handle;
|
|
|
|
out_free_domain:
|
|
iommu_domain_free(domain);
|
|
out_unlock:
|
|
mutex_unlock(&iommu_sva_lock);
|
|
kfree(handle);
|
|
|
|
return ERR_PTR(ret);
|
|
}
|
|
EXPORT_SYMBOL_GPL(iommu_sva_bind_device);
|
|
|
|
/**
|
|
* iommu_sva_unbind_device() - Remove a bond created with iommu_sva_bind_device
|
|
* @handle: the handle returned by iommu_sva_bind_device()
|
|
*
|
|
* Put reference to a bond between device and address space. The device should
|
|
* not be issuing any more transaction for this PASID. All outstanding page
|
|
* requests for this PASID must have been flushed to the IOMMU.
|
|
*/
|
|
void iommu_sva_unbind_device(struct iommu_sva *handle)
|
|
{
|
|
struct iommu_domain *domain = handle->domain;
|
|
ioasid_t pasid = domain->mm->pasid;
|
|
struct device *dev = handle->dev;
|
|
|
|
mutex_lock(&iommu_sva_lock);
|
|
if (--domain->users == 0) {
|
|
iommu_detach_device_pasid(domain, dev, pasid);
|
|
iommu_domain_free(domain);
|
|
}
|
|
mutex_unlock(&iommu_sva_lock);
|
|
kfree(handle);
|
|
}
|
|
EXPORT_SYMBOL_GPL(iommu_sva_unbind_device);
|
|
|
|
u32 iommu_sva_get_pasid(struct iommu_sva *handle)
|
|
{
|
|
struct iommu_domain *domain = handle->domain;
|
|
|
|
return domain->mm->pasid;
|
|
}
|
|
EXPORT_SYMBOL_GPL(iommu_sva_get_pasid);
|
|
|
|
/*
|
|
* I/O page fault handler for SVA
|
|
*/
|
|
enum iommu_page_response_code
|
|
iommu_sva_handle_iopf(struct iommu_fault *fault, void *data)
|
|
{
|
|
vm_fault_t ret;
|
|
struct vm_area_struct *vma;
|
|
struct mm_struct *mm = data;
|
|
unsigned int access_flags = 0;
|
|
unsigned int fault_flags = FAULT_FLAG_REMOTE;
|
|
struct iommu_fault_page_request *prm = &fault->prm;
|
|
enum iommu_page_response_code status = IOMMU_PAGE_RESP_INVALID;
|
|
|
|
if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID))
|
|
return status;
|
|
|
|
if (!mmget_not_zero(mm))
|
|
return status;
|
|
|
|
mmap_read_lock(mm);
|
|
|
|
vma = find_extend_vma(mm, prm->addr);
|
|
if (!vma)
|
|
/* Unmapped area */
|
|
goto out_put_mm;
|
|
|
|
if (prm->perm & IOMMU_FAULT_PERM_READ)
|
|
access_flags |= VM_READ;
|
|
|
|
if (prm->perm & IOMMU_FAULT_PERM_WRITE) {
|
|
access_flags |= VM_WRITE;
|
|
fault_flags |= FAULT_FLAG_WRITE;
|
|
}
|
|
|
|
if (prm->perm & IOMMU_FAULT_PERM_EXEC) {
|
|
access_flags |= VM_EXEC;
|
|
fault_flags |= FAULT_FLAG_INSTRUCTION;
|
|
}
|
|
|
|
if (!(prm->perm & IOMMU_FAULT_PERM_PRIV))
|
|
fault_flags |= FAULT_FLAG_USER;
|
|
|
|
if (access_flags & ~vma->vm_flags)
|
|
/* Access fault */
|
|
goto out_put_mm;
|
|
|
|
ret = handle_mm_fault(vma, prm->addr, fault_flags, NULL);
|
|
status = ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID :
|
|
IOMMU_PAGE_RESP_SUCCESS;
|
|
|
|
out_put_mm:
|
|
mmap_read_unlock(mm);
|
|
mmput(mm);
|
|
|
|
return status;
|
|
}
|
|
|
|
void mm_pasid_drop(struct mm_struct *mm)
|
|
{
|
|
if (likely(!mm_valid_pasid(mm)))
|
|
return;
|
|
|
|
ida_free(&iommu_global_pasid_ida, mm->pasid);
|
|
}
|