d3c16475dc
The doorbell offset on P5 chips is hard coded. On the new P7 chips, it is returned by the firmware. Simplify the logic that determines this offset and store it in a new db_offset field in struct bnxt. Also, provide this offset to the RoCE driver in struct bnxt_en_dev. Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com> Signed-off-by: Hongguang Gao <hongguang.gao@broadcom.com> Signed-off-by: Michael Chan <michael.chan@broadcom.com> Link: https://lore.kernel.org/r/20231201223924.26955-5-michael.chan@broadcom.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
116 lines
3.0 KiB
C
116 lines
3.0 KiB
C
/* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2016-2018 Broadcom Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*/
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#ifndef BNXT_ULP_H
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#define BNXT_ULP_H
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#define BNXT_ROCE_ULP 0
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#define BNXT_MAX_ULP 1
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#define BNXT_MIN_ROCE_CP_RINGS 2
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#define BNXT_MIN_ROCE_STAT_CTXS 1
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#define BNXT_MAX_ROCE_MSIX 9
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#define BNXT_MAX_VF_ROCE_MSIX 2
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struct hwrm_async_event_cmpl;
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struct bnxt;
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struct bnxt_msix_entry {
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u32 vector;
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u32 ring_idx;
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u32 db_offset;
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};
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struct bnxt_ulp_ops {
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void (*ulp_irq_stop)(void *);
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void (*ulp_irq_restart)(void *, struct bnxt_msix_entry *);
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};
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struct bnxt_fw_msg {
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void *msg;
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int msg_len;
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void *resp;
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int resp_max_len;
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int timeout;
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};
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struct bnxt_ulp {
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void *handle;
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struct bnxt_ulp_ops __rcu *ulp_ops;
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unsigned long *async_events_bmap;
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u16 max_async_event_id;
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u16 msix_requested;
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u16 msix_base;
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atomic_t ref_count;
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};
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struct bnxt_en_dev {
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struct net_device *net;
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struct pci_dev *pdev;
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struct bnxt_msix_entry msix_entries[BNXT_MAX_ROCE_MSIX];
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u32 flags;
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#define BNXT_EN_FLAG_ROCEV1_CAP 0x1
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#define BNXT_EN_FLAG_ROCEV2_CAP 0x2
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#define BNXT_EN_FLAG_ROCE_CAP (BNXT_EN_FLAG_ROCEV1_CAP | \
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BNXT_EN_FLAG_ROCEV2_CAP)
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#define BNXT_EN_FLAG_MSIX_REQUESTED 0x4
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#define BNXT_EN_FLAG_ULP_STOPPED 0x8
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#define BNXT_EN_FLAG_VF 0x10
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#define BNXT_EN_VF(edev) ((edev)->flags & BNXT_EN_FLAG_VF)
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struct bnxt_ulp *ulp_tbl;
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int l2_db_size; /* Doorbell BAR size in
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* bytes mapped by L2
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* driver.
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*/
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int l2_db_size_nc; /* Doorbell BAR size in
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* bytes mapped as non-
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* cacheable.
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*/
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int l2_db_offset; /* Doorbell offset in
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* bytes within
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* l2_db_size_nc.
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*/
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u16 chip_num;
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u16 hw_ring_stats_size;
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u16 pf_port_id;
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unsigned long en_state; /* Could be checked in
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* RoCE driver suspend
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* mode only. Will be
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* updated in resume.
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*/
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void __iomem *bar0;
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};
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static inline bool bnxt_ulp_registered(struct bnxt_en_dev *edev)
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{
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if (edev && edev->ulp_tbl)
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return true;
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return false;
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}
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int bnxt_get_ulp_msix_num(struct bnxt *bp);
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int bnxt_get_ulp_msix_base(struct bnxt *bp);
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int bnxt_get_ulp_stat_ctxs(struct bnxt *bp);
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void bnxt_ulp_stop(struct bnxt *bp);
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void bnxt_ulp_start(struct bnxt *bp, int err);
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void bnxt_ulp_sriov_cfg(struct bnxt *bp, int num_vfs);
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void bnxt_ulp_irq_stop(struct bnxt *bp);
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void bnxt_ulp_irq_restart(struct bnxt *bp, int err);
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void bnxt_ulp_async_events(struct bnxt *bp, struct hwrm_async_event_cmpl *cmpl);
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void bnxt_rdma_aux_device_uninit(struct bnxt *bp);
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void bnxt_rdma_aux_device_init(struct bnxt *bp);
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int bnxt_register_dev(struct bnxt_en_dev *edev, struct bnxt_ulp_ops *ulp_ops,
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void *handle);
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void bnxt_unregister_dev(struct bnxt_en_dev *edev);
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int bnxt_send_msg(struct bnxt_en_dev *edev, struct bnxt_fw_msg *fw_msg);
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int bnxt_register_async_events(struct bnxt_en_dev *edev,
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unsigned long *events_bmap, u16 max_id);
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#endif
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