1b43e0d20f
Added support for 1000BASE-BX, i.e. Gigabit Ethernet over single strand
of single-mode fiber.
The initialization of a 1000BASE-BX SFP is the same as 1000BASE-SX/LX
with the only difference that the Bit Rate Nominal Value must be
checked to make sure it is a Gigabit Ethernet transceiver, as described
by the SFF-8472 specification.
This was tested with the FS.com SFP-GE-BX 1310/1490nm 10km transceiver:
$ ethtool -m eth4
Identifier : 0x03 (SFP)
Extended identifier : 0x04 (GBIC/SFP defined by 2-wire interface ID)
Connector : 0x07 (LC)
Transceiver codes : 0x00 0x00 0x00 0x40 0x00 0x00 0x00 0x00 0x00
Transceiver type : Ethernet: BASE-BX10
Encoding : 0x01 (8B/10B)
BR, Nominal : 1300MBd
Rate identifier : 0x00 (unspecified)
Length (SMF,km) : 10km
Length (SMF) : 10000m
Length (50um) : 0m
Length (62.5um) : 0m
Length (Copper) : 0m
Length (OM3) : 0m
Laser wavelength : 1310nm
Vendor name : FS
Vendor OUI : 64:9d:99
Vendor PN : SFP-GE-BX
Vendor rev :
Option values : 0x20 0x0a
Option : RX_LOS implemented
Option : TX_FAULT implemented
Option : Power level 3 requirement
BR margin, max : 0%
BR margin, min : 0%
Vendor SN : S2202359108
Date code : 220307
Optical diagnostics support : Yes
Laser bias current : 17.650 mA
Laser output power : 0.2132 mW / -6.71 dBm
Receiver signal average optical power : 0.2740 mW / -5.62 dBm
Module temperature : 47.30 degrees C / 117.13 degrees F
Module voltage : 3.2576 V
Alarm/warning flags implemented : Yes
Laser bias current high alarm : Off
Laser bias current low alarm : Off
Laser bias current high warning : Off
Laser bias current low warning : Off
Laser output power high alarm : Off
Laser output power low alarm : Off
Laser output power high warning : Off
Laser output power low warning : Off
Module temperature high alarm : Off
Module temperature low alarm : Off
Module temperature high warning : Off
Module temperature low warning : Off
Module voltage high alarm : Off
Module voltage low alarm : Off
Module voltage high warning : Off
Module voltage low warning : Off
Laser rx power high alarm : Off
Laser rx power low alarm : Off
Laser rx power high warning : Off
Laser rx power low warning : Off
Laser bias current high alarm threshold : 110.000 mA
Laser bias current low alarm threshold : 1.000 mA
Laser bias current high warning threshold : 100.000 mA
Laser bias current low warning threshold : 1.000 mA
Laser output power high alarm threshold : 0.7079 mW / -1.50 dBm
Laser output power low alarm threshold : 0.0891 mW / -10.50 dBm
Laser output power high warning threshold : 0.6310 mW / -2.00 dBm
Laser output power low warning threshold : 0.1000 mW / -10.00 dBm
Module temperature high alarm threshold : 90.00 degrees C / 194.00 degrees F
Module temperature low alarm threshold : -45.00 degrees C / -49.00 degrees F
Module temperature high warning threshold : 85.00 degrees C / 185.00 degrees F
Module temperature low warning threshold : -40.00 degrees C / -40.00 degrees F
Module voltage high alarm threshold : 3.7950 V
Module voltage low alarm threshold : 2.8050 V
Module voltage high warning threshold : 3.4650 V
Module voltage low warning threshold : 3.1350 V
Laser rx power high alarm threshold : 0.7079 mW / -1.50 dBm
Laser rx power low alarm threshold : 0.0028 mW / -25.53 dBm
Laser rx power high warning threshold : 0.6310 mW / -2.00 dBm
Laser rx power low warning threshold : 0.0032 mW / -24.95 dBm
Signed-off-by: Ernesto Castellotti <ernesto@castellotti.net>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Tested-by: Sunitha Mekala <sunithax.d.mekala@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Link: https://lore.kernel.org/r/20240301184806.2634508-3-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
180 lines
7.0 KiB
C
180 lines
7.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 1999 - 2018 Intel Corporation. */
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#ifndef _IXGBE_PHY_H_
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#define _IXGBE_PHY_H_
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#include "ixgbe_type.h"
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#define IXGBE_I2C_EEPROM_DEV_ADDR 0xA0
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#define IXGBE_I2C_EEPROM_DEV_ADDR2 0xA2
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/* EEPROM byte offsets */
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#define IXGBE_SFF_IDENTIFIER 0x0
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#define IXGBE_SFF_IDENTIFIER_SFP 0x3
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#define IXGBE_SFF_VENDOR_OUI_BYTE0 0x25
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#define IXGBE_SFF_VENDOR_OUI_BYTE1 0x26
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#define IXGBE_SFF_VENDOR_OUI_BYTE2 0x27
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#define IXGBE_SFF_1GBE_COMP_CODES 0x6
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#define IXGBE_SFF_10GBE_COMP_CODES 0x3
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#define IXGBE_SFF_CABLE_TECHNOLOGY 0x8
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#define IXGBE_SFF_BITRATE_NOMINAL 0xC
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#define IXGBE_SFF_CABLE_SPEC_COMP 0x3C
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#define IXGBE_SFF_SFF_8472_SWAP 0x5C
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#define IXGBE_SFF_SFF_8472_COMP 0x5E
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#define IXGBE_SFF_SFF_8472_OSCB 0x6E
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#define IXGBE_SFF_SFF_8472_ESCB 0x76
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#define IXGBE_SFF_IDENTIFIER_QSFP_PLUS 0xD
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#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE0 0xA5
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#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE1 0xA6
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#define IXGBE_SFF_QSFP_VENDOR_OUI_BYTE2 0xA7
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#define IXGBE_SFF_QSFP_CONNECTOR 0x82
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#define IXGBE_SFF_QSFP_10GBE_COMP 0x83
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#define IXGBE_SFF_QSFP_1GBE_COMP 0x86
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#define IXGBE_SFF_QSFP_CABLE_LENGTH 0x92
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#define IXGBE_SFF_QSFP_DEVICE_TECH 0x93
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/* Bitmasks */
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#define IXGBE_SFF_DA_PASSIVE_CABLE 0x4
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#define IXGBE_SFF_DA_ACTIVE_CABLE 0x8
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#define IXGBE_SFF_DA_SPEC_ACTIVE_LIMITING 0x4
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#define IXGBE_SFF_1GBASESX_CAPABLE 0x1
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#define IXGBE_SFF_1GBASELX_CAPABLE 0x2
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#define IXGBE_SFF_1GBASET_CAPABLE 0x8
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#define IXGBE_SFF_BASEBX10_CAPABLE 0x64
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#define IXGBE_SFF_10GBASESR_CAPABLE 0x10
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#define IXGBE_SFF_10GBASELR_CAPABLE 0x20
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#define IXGBE_SFF_SOFT_RS_SELECT_MASK 0x8
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#define IXGBE_SFF_SOFT_RS_SELECT_10G 0x8
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#define IXGBE_SFF_SOFT_RS_SELECT_1G 0x0
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#define IXGBE_SFF_ADDRESSING_MODE 0x4
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#define IXGBE_SFF_DDM_IMPLEMENTED 0x40
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#define IXGBE_SFF_QSFP_DA_ACTIVE_CABLE 0x1
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#define IXGBE_SFF_QSFP_DA_PASSIVE_CABLE 0x8
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#define IXGBE_SFF_QSFP_CONNECTOR_NOT_SEPARABLE 0x23
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#define IXGBE_SFF_QSFP_TRANSMITER_850NM_VCSEL 0x0
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#define IXGBE_I2C_EEPROM_READ_MASK 0x100
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#define IXGBE_I2C_EEPROM_STATUS_MASK 0x3
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#define IXGBE_I2C_EEPROM_STATUS_NO_OPERATION 0x0
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#define IXGBE_I2C_EEPROM_STATUS_PASS 0x1
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#define IXGBE_I2C_EEPROM_STATUS_FAIL 0x2
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#define IXGBE_I2C_EEPROM_STATUS_IN_PROGRESS 0x3
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#define IXGBE_CS4227 0xBE /* CS4227 address */
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#define IXGBE_CS4227_GLOBAL_ID_LSB 0
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#define IXGBE_CS4227_GLOBAL_ID_MSB 1
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#define IXGBE_CS4227_SCRATCH 2
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#define IXGBE_CS4227_EFUSE_PDF_SKU 0x19F
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#define IXGBE_CS4223_SKU_ID 0x0010 /* Quad port */
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#define IXGBE_CS4227_SKU_ID 0x0014 /* Dual port */
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#define IXGBE_CS4227_RESET_PENDING 0x1357
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#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5
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#define IXGBE_CS4227_RETRIES 15
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#define IXGBE_CS4227_EFUSE_STATUS 0x0181
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#define IXGBE_CS4227_LINE_SPARE22_MSB 0x12AD /* Reg to set speed */
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#define IXGBE_CS4227_LINE_SPARE24_LSB 0x12B0 /* Reg to set EDC */
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#define IXGBE_CS4227_HOST_SPARE22_MSB 0x1AAD /* Reg to set speed */
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#define IXGBE_CS4227_HOST_SPARE24_LSB 0x1AB0 /* Reg to program EDC */
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#define IXGBE_CS4227_EEPROM_STATUS 0x5001
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#define IXGBE_CS4227_EEPROM_LOAD_OK 0x0001
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#define IXGBE_CS4227_SPEED_1G 0x8000
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#define IXGBE_CS4227_SPEED_10G 0
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#define IXGBE_CS4227_EDC_MODE_CX1 0x0002
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#define IXGBE_CS4227_EDC_MODE_SR 0x0004
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#define IXGBE_CS4227_EDC_MODE_DIAG 0x0008
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#define IXGBE_CS4227_RESET_HOLD 500 /* microseconds */
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#define IXGBE_CS4227_RESET_DELAY 500 /* milliseconds */
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#define IXGBE_CS4227_CHECK_DELAY 30 /* milliseconds */
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#define IXGBE_PE 0xE0 /* Port expander addr */
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#define IXGBE_PE_OUTPUT 1 /* Output reg offset */
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#define IXGBE_PE_CONFIG 3 /* Config reg offset */
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#define IXGBE_PE_BIT1 BIT(1)
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/* Flow control defines */
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#define IXGBE_TAF_SYM_PAUSE 0x400
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#define IXGBE_TAF_ASM_PAUSE 0x800
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/* Bit-shift macros */
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#define IXGBE_SFF_VENDOR_OUI_BYTE0_SHIFT 24
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#define IXGBE_SFF_VENDOR_OUI_BYTE1_SHIFT 16
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#define IXGBE_SFF_VENDOR_OUI_BYTE2_SHIFT 8
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/* Vendor OUIs: format of OUI is 0x[byte0][byte1][byte2][00] */
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#define IXGBE_SFF_VENDOR_OUI_TYCO 0x00407600
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#define IXGBE_SFF_VENDOR_OUI_FTL 0x00906500
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#define IXGBE_SFF_VENDOR_OUI_AVAGO 0x00176A00
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#define IXGBE_SFF_VENDOR_OUI_INTEL 0x001B2100
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/* I2C SDA and SCL timing parameters for standard mode */
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#define IXGBE_I2C_T_HD_STA 4
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#define IXGBE_I2C_T_LOW 5
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#define IXGBE_I2C_T_HIGH 4
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#define IXGBE_I2C_T_SU_STA 5
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#define IXGBE_I2C_T_HD_DATA 5
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#define IXGBE_I2C_T_SU_DATA 1
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#define IXGBE_I2C_T_RISE 1
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#define IXGBE_I2C_T_FALL 1
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#define IXGBE_I2C_T_SU_STO 4
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#define IXGBE_I2C_T_BUF 5
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#define IXGBE_SFP_DETECT_RETRIES 2
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#define IXGBE_TN_LASI_STATUS_REG 0x9005
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#define IXGBE_TN_LASI_STATUS_TEMP_ALARM 0x0008
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/* SFP+ SFF-8472 Compliance code */
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#define IXGBE_SFF_SFF_8472_UNSUP 0x00
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int ixgbe_mii_bus_init(struct ixgbe_hw *hw);
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int ixgbe_identify_phy_generic(struct ixgbe_hw *hw);
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int ixgbe_reset_phy_generic(struct ixgbe_hw *hw);
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int ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u16 *phy_data);
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int ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u16 phy_data);
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int ixgbe_read_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u16 *phy_data);
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int ixgbe_write_phy_reg_mdi(struct ixgbe_hw *hw, u32 reg_addr,
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u32 device_type, u16 phy_data);
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int ixgbe_setup_phy_link_generic(struct ixgbe_hw *hw);
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int ixgbe_setup_phy_link_speed_generic(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg_wait_to_complete);
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int ixgbe_get_copper_link_capabilities_generic(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *autoneg);
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bool ixgbe_check_reset_blocked(struct ixgbe_hw *hw);
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/* PHY specific */
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int ixgbe_check_phy_link_tnx(struct ixgbe_hw *hw,
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ixgbe_link_speed *speed,
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bool *link_up);
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int ixgbe_setup_phy_link_tnx(struct ixgbe_hw *hw);
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int ixgbe_reset_phy_nl(struct ixgbe_hw *hw);
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int ixgbe_set_copper_phy_power(struct ixgbe_hw *hw, bool on);
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int ixgbe_identify_module_generic(struct ixgbe_hw *hw);
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int ixgbe_identify_sfp_module_generic(struct ixgbe_hw *hw);
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int ixgbe_get_sfp_init_sequence_offsets(struct ixgbe_hw *hw,
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u16 *list_offset,
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u16 *data_offset);
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bool ixgbe_tn_check_overtemp(struct ixgbe_hw *hw);
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int ixgbe_read_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 *data);
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int ixgbe_read_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 *data);
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int ixgbe_write_i2c_byte_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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int ixgbe_write_i2c_byte_generic_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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int ixgbe_read_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *eeprom_data);
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int ixgbe_read_i2c_sff8472_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data);
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int ixgbe_write_i2c_eeprom_generic(struct ixgbe_hw *hw, u8 byte_offset,
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u8 eeprom_data);
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int ixgbe_read_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
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u16 *val, bool lock);
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int ixgbe_write_i2c_combined_generic_int(struct ixgbe_hw *, u8 addr, u16 reg,
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u16 val, bool lock);
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#endif /* _IXGBE_PHY_H_ */
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