Add support for - PPAG revision 3 in BIOS to enable PPAG in UHB - PPAG command version 5, this command allows OEM to control enablement of PPAG for LPI for UHB mode in USA and ETSI countries. Signed-off-by: Anjaneyulu <pagadala.yesu.anjaneyulu@intel.com> Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com> Link: https://msgid.link/20240204235836.d17425824b11.If2c1b29e3c579f4135383681af2d625cfe2cffcd@changeid Signed-off-by: Johannes Berg <johannes.berg@intel.com>
200 lines
5.1 KiB
C
200 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
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/*
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* Copyright (C) 2023 Intel Corporation
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*/
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#ifndef __fw_regulatory_h__
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#define __fw_regulatory_h__
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#include "fw/img.h"
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#include "fw/api/commands.h"
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#include "fw/api/power.h"
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#include "fw/api/phy.h"
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#include "fw/api/config.h"
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#include "fw/img.h"
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#include "iwl-trans.h"
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#define BIOS_SAR_MAX_PROFILE_NUM 4
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/*
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* Each SAR profile has (up to, depends on the table revision) 4 chains:
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* chain A, chain B, chain A when in CDB, chain B when in CDB
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*/
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#define BIOS_SAR_MAX_CHAINS_PER_PROFILE 4
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#define BIOS_SAR_NUM_CHAINS 2
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#define BIOS_SAR_MAX_SUB_BANDS_NUM 11
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#define BIOS_GEO_NUM_CHAINS 2
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#define BIOS_GEO_MAX_NUM_BANDS 3
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#define BIOS_GEO_MAX_PROFILE_NUM 8
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#define BIOS_GEO_MIN_PROFILE_NUM 3
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#define IWL_SAR_ENABLE_MSK BIT(0)
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/* PPAG gain value bounds in 1/8 dBm */
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#define IWL_PPAG_MIN_LB -16
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#define IWL_PPAG_MAX_LB 24
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#define IWL_PPAG_MIN_HB -16
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#define IWL_PPAG_MAX_HB 40
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#define IWL_PPAG_ETSI_CHINA_MASK 3
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#define IWL_PPAG_REV3_MASK 0x7FF
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#define IWL_WTAS_BLACK_LIST_MAX 16
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#define IWL_WTAS_ENABLED_MSK 0x1
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#define IWL_WTAS_OVERRIDE_IEC_MSK 0x2
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#define IWL_WTAS_ENABLE_IEC_MSK 0x4
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#define IWL_WTAS_USA_UHB_MSK BIT(16)
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/*
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* The profile for revision 2 is a superset of revision 1, which is in
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* turn a superset of revision 0. So we can store all revisions
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* inside revision 2, which is what we represent here.
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*/
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/*
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* struct iwl_sar_profile_chain - per-chain values of a SAR profile
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* @subbands: the SAR value for each subband
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*/
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struct iwl_sar_profile_chain {
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u8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM];
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};
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/*
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* struct iwl_sar_profile - SAR profile from SAR tables
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* @enabled: whether the profile is enabled or not
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* @chains: per-chain SAR values
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*/
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struct iwl_sar_profile {
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bool enabled;
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struct iwl_sar_profile_chain chains[BIOS_SAR_MAX_CHAINS_PER_PROFILE];
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};
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/* Same thing as with SAR, all revisions fit in revision 2 */
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/*
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* struct iwl_geo_profile_band - per-band geo SAR offsets
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* @max: the max tx power allowed for the band
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* @chains: SAR offsets values for each chain
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*/
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struct iwl_geo_profile_band {
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u8 max;
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u8 chains[BIOS_GEO_NUM_CHAINS];
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};
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/*
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* struct iwl_geo_profile - geo profile
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* @bands: per-band table of the SAR offsets
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*/
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struct iwl_geo_profile {
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struct iwl_geo_profile_band bands[BIOS_GEO_MAX_NUM_BANDS];
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};
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/* Same thing as with SAR, all revisions fit in revision 2 */
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struct iwl_ppag_chain {
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s8 subbands[BIOS_SAR_MAX_SUB_BANDS_NUM];
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};
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struct iwl_tas_data {
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__le32 block_list_size;
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__le32 block_list_array[IWL_WTAS_BLACK_LIST_MAX];
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u8 override_tas_iec;
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u8 enable_tas_iec;
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u8 usa_tas_uhb_allowed;
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};
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/* For DSM revision 0 and 4 */
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enum iwl_dsm_funcs {
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DSM_FUNC_QUERY = 0,
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DSM_FUNC_DISABLE_SRD = 1,
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DSM_FUNC_ENABLE_INDONESIA_5G2 = 2,
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DSM_FUNC_ENABLE_6E = 3,
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DSM_FUNC_REGULATORY_CONFIG = 4,
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DSM_FUNC_11AX_ENABLEMENT = 6,
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DSM_FUNC_ENABLE_UNII4_CHAN = 7,
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DSM_FUNC_ACTIVATE_CHANNEL = 8,
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DSM_FUNC_FORCE_DISABLE_CHANNELS = 9,
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DSM_FUNC_ENERGY_DETECTION_THRESHOLD = 10,
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DSM_FUNC_RFI_CONFIG = 11,
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DSM_FUNC_NUM_FUNCS = 12,
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};
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enum iwl_dsm_values_srd {
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DSM_VALUE_SRD_ACTIVE,
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DSM_VALUE_SRD_PASSIVE,
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DSM_VALUE_SRD_DISABLE,
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DSM_VALUE_SRD_MAX
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};
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enum iwl_dsm_values_indonesia {
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DSM_VALUE_INDONESIA_DISABLE,
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DSM_VALUE_INDONESIA_ENABLE,
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DSM_VALUE_INDONESIA_RESERVED,
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DSM_VALUE_INDONESIA_MAX
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};
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enum iwl_dsm_values_rfi {
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DSM_VALUE_RFI_DLVR_DISABLE = BIT(0),
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DSM_VALUE_RFI_DDR_DISABLE = BIT(1),
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};
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#define DSM_VALUE_RFI_DISABLE (DSM_VALUE_RFI_DLVR_DISABLE |\
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DSM_VALUE_RFI_DDR_DISABLE)
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enum iwl_dsm_masks_reg {
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DSM_MASK_CHINA_22_REG = BIT(2)
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};
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struct iwl_fw_runtime;
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bool iwl_sar_geo_support(struct iwl_fw_runtime *fwrt);
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int iwl_sar_geo_fill_table(struct iwl_fw_runtime *fwrt,
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struct iwl_per_chain_offset *table,
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u32 n_bands, u32 n_profiles);
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int iwl_sar_fill_profile(struct iwl_fw_runtime *fwrt,
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__le16 *per_chain, u32 n_tables, u32 n_subbands,
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int prof_a, int prof_b);
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int iwl_fill_ppag_table(struct iwl_fw_runtime *fwrt,
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union iwl_ppag_table_cmd *cmd,
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int *cmd_size);
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bool iwl_is_ppag_approved(struct iwl_fw_runtime *fwrt);
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bool iwl_is_tas_approved(void);
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int iwl_parse_tas_selection(struct iwl_fw_runtime *fwrt,
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struct iwl_tas_data *tas_data,
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const u32 tas_selection);
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int iwl_bios_get_wrds_table(struct iwl_fw_runtime *fwrt);
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int iwl_bios_get_ewrd_table(struct iwl_fw_runtime *fwrt);
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int iwl_bios_get_wgds_table(struct iwl_fw_runtime *fwrt);
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int iwl_bios_get_ppag_table(struct iwl_fw_runtime *fwrt);
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int iwl_bios_get_tas_table(struct iwl_fw_runtime *fwrt,
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struct iwl_tas_data *data);
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int iwl_bios_get_pwr_limit(struct iwl_fw_runtime *fwrt,
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u64 *dflt_pwr_limit);
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int iwl_bios_get_mcc(struct iwl_fw_runtime *fwrt, char *mcc);
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int iwl_bios_get_eckv(struct iwl_fw_runtime *fwrt, u32 *ext_clk);
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__le32 iwl_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt);
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int iwl_bios_get_dsm(struct iwl_fw_runtime *fwrt, enum iwl_dsm_funcs func,
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u32 *value);
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static inline u32 iwl_bios_get_ppag_flags(const u32 ppag_modes,
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const u8 ppag_ver)
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{
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return ppag_modes & (ppag_ver < 3 ? IWL_PPAG_ETSI_CHINA_MASK :
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IWL_PPAG_REV3_MASK);
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}
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#endif /* __fw_regulatory_h__ */
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