1dfeb03e86
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on RZ/G2L,
- Rework SDHI clock handling in the R-Car Gen3 and RZ/G2 clock
drivers, and in the Renesas SDHI driver,
- Make the Cortex-A55 (I) clock on RZ/G2L programmable,
- Document support for the new R-Car S4-8 (R8A779F0) SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-clk-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and
thermal (TSU) clocks and resets on RZ/G2L
- Rework SDHI clock handling in the R-Car Gen3 and RZ/G2 clock
drivers, and in the Renesas SDHI driver
- Make the Cortex-A55 (I) clock on RZ/G2L programmable,
- Document support for the new R-Car S4-8 (R8A779F0) SoC
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: (24 commits)
clk: renesas: r9a07g044: Add TSU clock and reset entry
mmc: renesas_sdhi: Simplify an expression
mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock
dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0
clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple()
clk: renesas: cpg-mssr: Check return value of pm_genpd_init()
clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple()
clk: renesas: rzg2l: Check return value of pm_genpd_init()
clk: renesas: r9a07g044: Add RSPI clock and reset entries
clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV
clk: renesas: rzg2l: Add CPG_PL1_DDIV macro
mmc: renesas_sdhi: Parse DT for SDnH
mmc: renesas_sdhi: Use dev_err_probe when getting clock fails
clk: renesas: rcar-gen3: Remove outdated SD_SKIP_FIRST
clk: renesas: rcar-gen3: Switch to new SD clock handling
mmc: renesas_sdhi: Flag non-standard SDnH handling for V3M
clk: renesas: r8a779a0: Add SDnH clock to V3U
clk: renesas: rcar-gen3: Add SDnH clock
clk: renesas: rcar-gen3: Add dummy SDnH clock
clk: renesas: r9a07g044: Add OSTM clock and reset entries
...
Linux kernel
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