1eaff71017
Restoring the timer interrupt status is not possible because writing a 1 to any bit in the register clears that bit if set and writing a 0 has no affect. Furthermore, if an interrupt is pending when someone attempts to disable a timer, the timer will fail to transition to the idle state and hence it's context will not be lost. Users should take care to service all interrupts before disabling the timer. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> |
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| .. | ||
| counter-32k.h | ||
| cpu.h | ||
| debug-devices.h | ||
| dmtimer.h | ||
| i2c.h | ||
| iommu2.h | ||
| iommu.h | ||
| iopgtable.h | ||
| iovmm.h | ||
| mailbox.h | ||
| omap-serial.h | ||
| prcm.h | ||
| sram.h | ||
| timex.h | ||
| vram.h | ||