88dffe43cb
Convert Tegra audio complex with the * ALC5632 * MAX98090 * RT5640 * RT5677 * SGTL5000 * TrimSlice * WM8753 * WM8903 * WM9712 codec to the YAML format. Additional changes: - added missing HPOUTL to the WM9712 codec. - extended rt5677 codec with multiple pins Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211211224946.79875-1-david@ixit.cz Signed-off-by: Mark Brown <broonie@kernel.org>
80 lines
1.9 KiB
YAML
80 lines
1.9 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm8753.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NVIDIA Tegra audio complex with WM8753 CODEC
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maintainers:
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- Jon Hunter <jonathanh@nvidia.com>
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- Thierry Reding <thierry.reding@gmail.com>
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allOf:
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- $ref: nvidia,tegra-audio-common.yaml#
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properties:
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compatible:
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items:
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- pattern: '^[a-z0-9]+,tegra-audio-wm8753(-[a-z0-9]+)+$'
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- const: nvidia,tegra-audio-wm8753
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nvidia,audio-routing:
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$ref: /schemas/types.yaml#/definitions/non-unique-string-array
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description: |
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A list of the connections between audio components.
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Each entry is a pair of strings, the first being the connection's sink,
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the second being the connection's source. Valid names for sources and
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sinks are the pins (documented in the binding document),
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and the jacks on the board.
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minItems: 2
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items:
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enum:
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# Board Connectors
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- "Headphone Jack"
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- "Mic Jack"
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# CODEC Pins
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- LOUT1
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- LOUT2
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- ROUT1
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- ROUT2
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- MONO1
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- MONO2
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- OUT3
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- OUT4
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- LINE1
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- LINE2
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- RXP
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- RXN
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- ACIN
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- ACOP
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- MIC1N
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- MIC1
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- MIC2N
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- MIC2
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- "Mic Bias"
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required:
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- nvidia,i2s-controller
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unevaluatedProperties: false
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examples:
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- |
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sound {
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compatible = "nvidia,tegra-audio-wm8753-whistler",
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"nvidia,tegra-audio-wm8753";
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nvidia,model = "tegra-wm8753-harmony";
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nvidia,audio-routing =
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"Headphone Jack", "LOUT1",
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"Headphone Jack", "ROUT1";
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nvidia,i2s-controller = <&i2s1>;
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nvidia,audio-codec = <&wm8753>;
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clocks = <&clk 112>, <&clk 113>, <&clk 93>;
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clock-names = "pll_a", "pll_a_out0", "mclk";
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};
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