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Add clock controller nodes, include 40M clock source, topckgen, infracfg, apmixedsys and ethernet subsystem. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Link: https://lore.kernel.org/r/20220119123624.10043-2-sam.shih@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>