John David Anglin 1fc7db2401 parisc: Don't enforce DMA completion order in cache flushes ... The only place we need to ensure all outstanding cache coherence operations are complete is in invalidate_kernel_vmap_range. All parisc drivers synchronize DMA operations internally and do not call invalidate_kernel_vmap_range. We only need this for non-coherent I/O operations. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>		2022-05-23 13:44:24 +02:00
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asm	parisc: Don't enforce DMA completion order in cache flushes	2022-05-23 13:44:24 +02:00
uapi/asm	mm: madvise: MADV_DONTNEED_LOCKED	2022-03-24 19:06:51 -07:00