Dmitry Osipenko 20e92462cd memory: tegra: Introduce memory client hot reset ... In order to reset busy HW properly, memory controller needs to be involved, otherwise it is possible to get corrupted memory or hang machine if HW was reset during DMA. Introduce memory client 'hot reset' that will be used for resetting of busy HW. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>		2018-04-30 10:12:21 +02:00
..
arc	ARC: mcip: update MCIP debug mask when the new cpu came online	2018-02-28 10:45:31 -08:00
at91	clk: at91: utmi: set the mainck rate	2017-11-01 23:39:49 -07:00
bcm2835	soc: bcm2835: sync firmware properties with downstream	2018-02-22 13:46:35 +01:00
brcmstb	soc: add stubs for brcmstb SoC's	2015-09-14 15:44:18 -07:00
fsl	net/wan/fsl_ucc_hdlc: add hdlc-bus support	2017-05-18 10:28:39 -04:00
imx	ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h	2016-06-21 14:35:29 +08:00
mediatek	iommu/mediatek: Add mt2712 IOMMU support	2017-08-22 16:37:58 +02:00
nps	soc: Support for NPS HW scheduling	2016-11-30 11:54:25 -08:00
rockchip	soc: rockchip: add header for ddr rate SIP interface	2016-08-31 18:53:24 +02:00
sa1100	ARM: 8361/1: sa1100: add platform functions to handle PWER settings	2015-05-18 22:00:22 +01:00
tegra	memory: tegra: Introduce memory client hot reset	2018-04-30 10:12:21 +02:00