Currently the example provided in arm,mhu schema complains as below: Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml :0:0: /example-0/soc/scb@2e000000: failed to match any schema with compatible: ['fujitsu,mb86s70-scb-1.0'] Fix the same using examples based on Juno platform. The old SCPI firmware used MHU with standard 32-bit data transfer protocol while the new SCMI firmware uses MHU and expects to be used in doorbell mode. Update example with SCPI and SCMI firmware nodes to demonstrate both 32-bit data transfer and doorbell mode of MHU operations Cc: Rob Herring <robh+dt@kernel.org> Cc: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Link: https://lore.kernel.org/r/20210604205710.1944363-6-sudeep.holla@arm.com Signed-off-by: Rob Herring <robh@kernel.org>
169 lines
4.7 KiB
YAML
169 lines
4.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ARM MHU Mailbox Controller
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maintainers:
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- Jassi Brar <jaswinder.singh@linaro.org>
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description: |
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The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
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independent channels/links to communicate with remote processor(s). MHU links
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are hardwired on a platform. A link raises interrupt for any received data.
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However, there is no specified way of knowing if the sent data has been read
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by the remote. This driver assumes the sender polls STAT register and the
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remote clears it after having read the data. The last channel is specified to
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be a 'Secure' resource, hence can't be used by Linux running NS.
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The MHU hardware also allows operations in doorbell mode. The MHU drives the
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interrupt signal using a 32-bit register, with all 32-bits logically ORed
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together. It provides a set of registers to enable software to set, clear and
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check the status of each of the bits of this register independently. The use
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of 32 bits per interrupt line enables software to provide more information
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about the source of the interrupt. For example, each bit of the register can
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be associated with a type of event that can contribute to raising the
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interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
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processor.
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# We need a select here so we don't match all nodes with 'arm,primecell'
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select:
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properties:
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compatible:
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contains:
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enum:
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- arm,mhu
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- arm,mhu-doorbell
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required:
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- compatible
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properties:
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compatible:
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oneOf:
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- description: Data transfer mode
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items:
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- const: arm,mhu
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- const: arm,primecell
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- description: Doorbell mode
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items:
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- const: arm,mhu-doorbell
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- const: arm,primecell
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: low-priority non-secure
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- description: high-priority non-secure
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- description: Secure
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: apb_pclk
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'#mbox-cells':
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description: |
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Set to 1 in data transfer mode and represents index of the channel.
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Set to 2 in doorbell mode and represents index of the channel and doorbell
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number.
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enum: [ 1, 2 ]
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required:
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- compatible
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- reg
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- interrupts
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- '#mbox-cells'
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additionalProperties: false
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examples:
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# Data transfer mode.
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mhuA: mailbox@2b1f0000 {
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#mbox-cells = <1>;
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compatible = "arm,mhu", "arm,primecell";
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reg = <0 0x2b1f0000 0 0x1000>;
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interrupts = <0 36 4>, /* LP-NonSecure */
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<0 35 4>, /* HP-NonSecure */
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<0 37 4>; /* Secure */
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clocks = <&clock 0 2 1>;
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clock-names = "apb_pclk";
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};
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};
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firmware {
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scpi {
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compatible = "arm,scpi";
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mboxes = <&mhuA 1>; /* HP-NonSecure */
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shmem = <&cpu_scp_hpri>; /* HP-NonSecure */
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scpi_devpd: power-controller {
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compatible = "arm,scpi-power-domains";
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num-domains = <2>;
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#power-domain-cells = <1>;
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};
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};
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};
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# Doorbell mode.
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mhuB: mailbox@2b2f0000 {
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#mbox-cells = <2>;
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compatible = "arm,mhu-doorbell", "arm,primecell";
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reg = <0 0x2b2f0000 0 0x1000>;
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interrupts = <0 36 4>, /* LP-NonSecure */
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<0 35 4>, /* HP-NonSecure */
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<0 37 4>; /* Secure */
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clocks = <&clock 0 2 1>;
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clock-names = "apb_pclk";
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};
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};
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firmware {
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scmi {
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compatible = "arm,scmi";
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mboxes = <&mhuB 0 0>, /* LP-NonSecure, 1st doorbell */
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<&mhuB 0 1>; /* LP-NonSecure, 2nd doorbell */
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mbox-names = "tx", "rx";
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shmem = <&cpu_scp_lpri0>,
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<&cpu_scp_lpri1>;
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#address-cells = <1>;
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#size-cells = <0>;
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scmi_devpd: protocol@11 {
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reg = <0x11>;
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#power-domain-cells = <1>;
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};
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scmi_dvfs: protocol@13 {
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reg = <0x13>;
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#clock-cells = <1>;
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mboxes = <&mhuB 1 2>, /* HP-NonSecure, 3rd doorbell */
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<&mhuB 1 3>; /* HP-NonSecure, 4th doorbell */
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mbox-names = "tx", "rx";
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shmem = <&cpu_scp_hpri0>,
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<&cpu_scp_hpri1>;
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};
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};
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};
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...
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