b237676039
Judging by xrs700x_phylink_get_caps(), I deduce that this switch supports the RGMII modes on port 3, so state this phy-mode in the example, such that users are encouraged to not rely on avoiding phylink for this port. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
76 lines
1.8 KiB
YAML
76 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/dsa/arrow,xrs700x.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Arrow SpeedChips XRS7000 Series Switch Device Tree Bindings
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allOf:
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- $ref: dsa.yaml#
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maintainers:
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- George McCollister <george.mccollister@gmail.com>
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description:
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The Arrow SpeedChips XRS7000 Series of single chip gigabit Ethernet switches
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are designed for critical networking applications. They have up to three
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RGMII ports and one RMII port and are managed via i2c or mdio.
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properties:
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compatible:
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oneOf:
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- enum:
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- arrow,xrs7003e
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- arrow,xrs7003f
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- arrow,xrs7004e
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- arrow,xrs7004f
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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i2c {
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#address-cells = <1>;
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#size-cells = <0>;
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switch@8 {
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compatible = "arrow,xrs7004e";
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reg = <0x8>;
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ethernet-ports {
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#address-cells = <1>;
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#size-cells = <0>;
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ethernet-port@1 {
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reg = <1>;
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label = "lan0";
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phy-handle = <&swphy0>;
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phy-mode = "rgmii-id";
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};
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ethernet-port@2 {
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reg = <2>;
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label = "lan1";
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phy-handle = <&swphy1>;
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phy-mode = "rgmii-id";
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};
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ethernet-port@3 {
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reg = <3>;
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label = "cpu";
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ethernet = <&fec1>;
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phy-mode = "rgmii-id";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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};
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