linux

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Gaku Inami 2250d856b2 arm64: dts: renesas: Add CPU capacity-dmips-mhz

Set the capacity-dmips-mhz for R-Car Gen3 SoCs, that is based on
dhrystone. The average in 10 times of dhrystone result as follows:

r8a7795 SoC (A57x4 + A53x4)
  CPU   max-freq   dhrystone
  ---------------------------------
  A57   1500 MHz  11470943 lps/s
  A53   1200 MHz   4798583 lps/s

r8a7796 SoC (A57x2 + A53x4)
  CPU   max-freq   dhrystone
  ---------------------------------
  A57   1500 MHz  11463526 lps/s
  A53   1200 MHz   4793276 lps/s

Based on above, capacity-dmips-mhz values are calculated as follows:

r8a7795 SoC
  A57 : 1024 / (11470943 / 1500) * (11470943 / 1500) = 1024
  A53 : 1024 / (11470943 / 1500) * ( 4798583 / 1200) =  535

r8a7796 SoC
  A57 : 1024 / (11463526 / 1500) * (11463526 / 1500) = 1024
  A53 : 1024 / (11463526 / 1500) * ( 4793276 / 1200) =  535

However, since each CPUs have different max frequencies, the final
CPU capacities of A53 are scaled by this difference, the values are
as follows.

[r8a7795 SoC]
  $ cat /sys/devices/system/cpu/cpu*/cpu_capacity
  1024	<---- CPU capacity of A57
  1024
  1024
  1024
  428	<---- CPU capacity of A53
  428
  428
  428

[r8a7796 SoC]
  $ cat /sys/devices/system/cpu/cpu*/cpu_capacity
  1024	<---- CPU capacity of A57
  1024
  428	<---- CPU capacity of A53
  428
  428
  428

Signed-off-by: Gaku Inami <gaku.inami.xh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

2018-11-15 06:27:31 -08:00

alpha

memblock: stop using implicit alignment to SMP_CACHE_BYTES

2018-10-31 08:54:16 -07:00

arc

mm: remove include/linux/bootmem.h

2018-10-31 08:54:16 -07:00

arm

ARM: SoC fixes

2018-11-03 12:13:57 -07:00

arm64

arm64: dts: renesas: Add CPU capacity-dmips-mhz