Andrew Jones 23e1dc4502 RISC-V: KVM: Make SBI uapi consistent with ISA uapi ...

When an SBI extension cannot be enabled, that's a distinct state vs.
enabled and disabled. Modify enum kvm_riscv_sbi_ext_status to
accommodate it, which allows KVM userspace to tell the difference
in state too, as the SBI extension register will disappear when it
cannot be enabled, i.e. accesses to it return ENOENT. get-reg-list is
updated as well to only add SBI extension registers to the list which
may be enabled. Returning ENOENT for SBI extension registers which
cannot be enabled makes them consistent with ISA extension registers.
Any SBI extensions which were enabled by default are still enabled by
default, if they can be enabled at all.

Signed-off-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Signed-off-by: Anup Patel <anup@brainfault.org>

2023-12-29 12:31:44 +05:30

..

aia_aplic.c

RISC-V: KVM: Expose APLIC registers as attributes of AIA irqchip

2023-06-18 21:24:50 +05:30

aia_device.c

RISC-V: KVM: Remove unneeded semicolon

2023-06-20 10:48:38 +05:30

aia_imsic.c

RISCV: KVM: update external interrupt atomically for IMSIC swfile

2023-12-13 11:59:52 +05:30

aia.c

riscv: Rearrange hwcap.h and cpufeature.h

2023-11-09 10:15:51 -08:00

Kconfig

RISC-V: KVM: Skeletal in-kernel AIA irqchip support

2023-06-18 21:24:40 +05:30

main.c

riscv: Rearrange hwcap.h and cpufeature.h

2023-11-09 10:15:51 -08:00

Makefile

RISC-V: KVM: Factor-out ONE_REG related code to its own source file

2023-08-08 17:25:29 +05:30

mmu.c

Common KVM changes for 6.6:

2023-08-31 13:19:55 -04:00

tlb.c

riscv: Rearrange hwcap.h and cpufeature.h

2023-11-09 10:15:51 -08:00

vcpu_exit.c

RISC-V: KVM: Redirect AMO load/store misaligned traps to guest

2023-06-06 09:04:11 +05:30

vcpu_fp.c

riscv: Rearrange hwcap.h and cpufeature.h

2023-11-09 10:15:51 -08:00

vcpu_insn.c

RISC-V: KVM: Initial skeletal support for AIA

2023-04-21 17:45:48 +05:30

vcpu_onereg.c

RISC-V: KVM: Make SBI uapi consistent with ISA uapi

2023-12-29 12:31:44 +05:30

vcpu_pmu.c

RISC-V: KVM: Support firmware events

2023-02-07 20:36:06 +05:30

vcpu_sbi_base.c

RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions

2023-04-21 17:38:44 +05:30

vcpu_sbi_hsm.c

RISC-V: KVM: Modify SBI extension handler to return SBI error code

2023-02-07 20:35:45 +05:30

vcpu_sbi_pmu.c

RISC-V: KVM: Add SBI PMU extension support

2023-02-07 20:35:53 +05:30

vcpu_sbi_replace.c

RISC-V: KVM: Make SBI uapi consistent with ISA uapi

2023-12-29 12:31:44 +05:30

vcpu_sbi_v01.c

RISC-V: KVM: Modify SBI extension handler to return SBI error code

2023-02-07 20:35:45 +05:30

vcpu_sbi.c

RISC-V: KVM: Make SBI uapi consistent with ISA uapi

2023-12-29 12:31:44 +05:30

vcpu_switch.S

riscv: kvm: use ".L" local labels in assembly when applicable

2023-12-29 12:31:33 +05:30

vcpu_timer.c

RISC-V: KVM: do not EOPNOTSUPP in set KVM_REG_RISCV_TIMER_REG

2023-08-08 17:25:49 +05:30

vcpu_vector.c

riscv: Rearrange hwcap.h and cpufeature.h

2023-11-09 10:15:51 -08:00

vcpu.c

RISC-V: KVM: remove a redundant condition in kvm_arch_vcpu_ioctl_run()

2023-12-29 12:31:36 +05:30

vm.c

RISC-V: KVM: Skeletal in-kernel AIA irqchip support

2023-06-18 21:24:40 +05:30

vmid.c

RISC-V: KVM: Drop the _MASK suffix from hgatp.VMID mask defines

2023-04-21 17:45:44 +05:30