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Luca Ceresoli 23f872b6ec fpga manager: xilinx-spi: remove unneeded, mistyped variables 
Using variables does not add readability here: parameters passed
to udelay*() are obviously in microseconds and their meaning is clear
from the context.

The type is also wrong, udelay expects an unsigned long.

Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
2020-06-18 18:19:44 -07:00
..
altera-cvp.c
fpga: altera-cvp: Add Stratix10 (V2) Support
2019-08-24 11:38:29 -07:00
altera-fpga2sdram.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-hps2fpga.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c
fpga: altera-pr-ip: Make alt_pr_unregister function void
2019-07-24 14:11:52 -07:00
altera-pr-ip-core.c
fpga: altera-pr-ip: Make alt_pr_unregister function void
2019-07-24 14:11:52 -07:00
altera-ps-spi.c
fpga: altera-ps-spi: Fix getting of optional confd gpio
2019-08-18 17:40:02 -07:00
dfl-afu-dma-region.c
fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()
2020-06-18 18:12:06 -07:00
dfl-afu-error.c
fpga: dfl: afu: add error reporting support.
2019-09-03 19:35:41 -07:00
dfl-afu-main.c
fpga: dfl: afu: support debug access to memory-mapped afu regions
2020-04-29 20:37:12 -07:00
dfl-afu-region.c
fpga: dfl: afu: add afu sub feature support
2018-07-15 13:55:47 +02:00
dfl-afu.h
fpga: dfl: afu: add error reporting support.
2019-09-03 19:35:41 -07:00
dfl-fme-br.c
fpga: bridge: add devm_fpga_bridge_create
2018-10-16 11:13:50 +02:00
dfl-fme-error.c
fpga: dfl: fme: add global error reporting support
2019-09-03 19:35:41 -07:00
dfl-fme-main.c
FPGA Manager changes for 5.8
2020-05-15 16:09:24 +02:00
dfl-fme-mgr.c
fpga: dfl-fme-mgr: fix FME_PR_INTFC_ID register address.
2019-07-03 19:58:58 +02:00
dfl-fme-perf.c
fpga: dfl: fme: add performance reporting support
2020-04-28 15:49:28 +02:00
dfl-fme-pr.c
drivers/fpga/dfl-fme-pr.c: get rid of pointless access_ok()
2020-05-29 11:04:56 -04:00
dfl-fme-pr.h
fpga: dfl: fme: add partial reconfiguration sub feature support
2018-07-15 13:55:46 +02:00
dfl-fme-region.c
fpga: dfl-fme-region: Use platform_get_drvdata()
2018-11-26 20:47:10 +01:00
dfl-fme.h
fpga: dfl: fme: add performance reporting support
2020-04-28 15:49:28 +02:00
dfl-pci.c
fpga: dfl: pci: fix return value of cci_pci_sriov_configure
2020-03-30 20:45:30 -07:00
dfl.c
fpga: dfl: support multiple opens on feature device node.
2020-04-29 20:37:07 -07:00
dfl.h
FPGA Manager changes for 5.8
2020-05-15 16:09:24 +02:00
fpga-bridge.c
drivers: Introduce device lookup variants by of_node
2019-07-30 13:07:41 +02:00
fpga-mgr.c
drivers: Introduce device lookup variants by of_node
2019-07-30 13:07:41 +02:00
fpga-region.c
fpga: add devm_fpga_region_create
2018-10-16 11:13:50 +02:00
ice40-spi.c
fpga: ice40-spi: Use new structure for SPI transfer delays
2020-04-29 20:37:08 -07:00
Kconfig
fpga: dfl: fme: add performance reporting support
2020-04-28 15:49:28 +02:00
machxo2-spi.c
fpga: machxo2-spi: Use new structure for SPI transfer delays
2020-04-29 20:37:08 -07:00
Makefile
fpga: dfl: fme: add performance reporting support
2020-04-28 15:49:28 +02:00
of-fpga-region.c
drivers: Add generic helper to match by of_node
2019-06-24 05:22:31 +02:00
socfpga-a10.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
socfpga.c
fpga: mgr: add devm_fpga_mgr_create
2018-10-16 11:13:50 +02:00
stratix10-soc.c
FPGA Manager changes for 5.8
2020-05-15 16:09:24 +02:00
ts73xx-fpga.c
fpga: remove redundant dev_err message
2020-01-02 20:57:34 -08:00
xilinx-pr-decoupler.c
fpga: xilinx-pr-decoupler: Remove clk_get error message for probe defer
2020-01-10 12:51:56 -08:00
xilinx-spi.c
fpga manager: xilinx-spi: remove unneeded, mistyped variables
2020-06-18 18:19:44 -07:00
zynq-fpga.c
fpga: zynq: Remove clk_get error message for probe defer
2020-03-30 20:45:21 -07:00
zynqmp-fpga.c
firmware: xilinx: Remove eemi ops for fpga related APIs
2020-04-28 15:45:09 +02:00