linux

iv/linux

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Shameer Kolothum 24062fe858 perf/smmuv3: Enable HiSilicon Erratum 162001800 quirk

HiSilicon erratum 162001800 describes the limitation of
SMMUv3 PMCG implementation on HiSilicon Hip08 platforms.

On these platforms, the PMCG event counter registers
(SMMU_PMCG_EVCNTRn) are read only and as a result it
is not possible to set the initial counter period value
on event monitor start.

To work around this, the current value of the counter
is read and used for delta calculations. OEM information
from ACPI header is used to identify the affected hardware
platforms.

Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
[will: update silicon-errata.txt and add reason string to acpi match]
Signed-off-by: Will Deacon <will.deacon@arm.com>

2019-04-04 16:49:22 +01:00

hisilicon

For drivers that do not support context exclusion let's advertise the

2019-01-21 11:01:24 +01:00

arm_dsu_pmu.c

For drivers that do not support context exclusion let's advertise the

2019-01-21 11:01:24 +01:00

arm_pmu_acpi.c

arm_pmu: acpi: request IRQs up-front

2018-02-20 11:34:54 +00:00

arm_pmu_platform.c

perf: Convert to using %pOFn instead of device_node.name