c629196d04
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. [treding@nvidia.com: factored out patch and wrote commit message] Signed-off-by: David Heidelberg <david@ixit.cz> Co-developed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
107 lines
2.3 KiB
Plaintext
107 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
|
|
/dts-v1/;
|
|
|
|
#include "tegra20-tamonten.dtsi"
|
|
|
|
/ {
|
|
model = "Avionic Design Tamonten Evaluation Carrier";
|
|
compatible = "ad,tec", "ad,tamonten", "nvidia,tegra20";
|
|
|
|
host1x@50000000 {
|
|
hdmi@54280000 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
i2c@7000c000 {
|
|
wm8903: wm8903@1a {
|
|
compatible = "wlf,wm8903";
|
|
reg = <0x1a>;
|
|
interrupt-parent = <&gpio>;
|
|
interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
micdet-cfg = <0>;
|
|
micdet-delay = <100>;
|
|
gpio-cfg = <0xffffffff
|
|
0xffffffff
|
|
0
|
|
0xffffffff
|
|
0xffffffff>;
|
|
};
|
|
};
|
|
|
|
pcie@80003000 {
|
|
status = "okay";
|
|
|
|
pci@1,0 {
|
|
status = "okay";
|
|
};
|
|
};
|
|
|
|
sound {
|
|
compatible = "ad,tegra-audio-wm8903-tec",
|
|
"nvidia,tegra-audio-wm8903";
|
|
nvidia,model = "Avionic Design TEC";
|
|
|
|
nvidia,audio-routing =
|
|
"Headphone Jack", "HPOUTR",
|
|
"Headphone Jack", "HPOUTL",
|
|
"Int Spk", "ROP",
|
|
"Int Spk", "RON",
|
|
"Int Spk", "LOP",
|
|
"Int Spk", "LON",
|
|
"Mic Jack", "MICBIAS",
|
|
"IN1L", "Mic Jack";
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
|
nvidia,audio-codec = <&wm8903>;
|
|
|
|
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
|
|
GPIO_ACTIVE_LOW>;
|
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
|
};
|
|
|
|
vcc_24v_reg: regulator-24v {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vcc_24v";
|
|
regulator-min-microvolt = <24000000>;
|
|
regulator-max-microvolt = <24000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vdd_5v0_reg: regulator-5v0 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_5v0";
|
|
vin-supply = <&vcc_24v_reg>;
|
|
regulator-min-microvolt = <5000000>;
|
|
regulator-max-microvolt = <5000000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vdd_3v3_reg: regulator-3v3 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_3v3";
|
|
vin-supply = <&vcc_24v_reg>;
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
vdd_1v8_reg: regulator-1v8 {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vdd_1v8";
|
|
vin-supply = <&vdd_3v3_reg>;
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-always-on;
|
|
};
|
|
};
|