0bc519d20f
After noticing in logs there were still mentions to GEN6 registers, it
was clear commit d9b79ad275e7 ("drm/xe: Drop gen afixes from registers")
didn't take care of all the afixes. Some were added later, but there are
also constants and strings still using that. Continue the cleanup
removing the remaining ones.
To keep it consistent with code nearby, a few other changes are made:
- Remove prefix in INTEL_LEGACY_64B_CONTEXT
- Remove GEN8_CTX_L3LLC_COHERENT since it's unused
- Rename GEN9_FREQ_SCALER to GT_FREQUENCY_SCALER
v2: Use XELP_ as prefix for NUM_MOCS_ENTRIES and remove changes to
MOCS_ENTRIES as this is now done as part of a previous commit
(Matt Roper)
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20231117174049.527192-3-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
271 lines
8.2 KiB
C
271 lines
8.2 KiB
C
// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "xe_wopcm.h"
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#include "regs/xe_guc_regs.h"
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#include "xe_device.h"
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#include "xe_force_wake.h"
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#include "xe_gt.h"
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#include "xe_mmio.h"
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#include "xe_uc_fw.h"
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/**
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* DOC: Write Once Protected Content Memory (WOPCM) Layout
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*
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* The layout of the WOPCM will be fixed after writing to GuC WOPCM size and
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* offset registers whose values are calculated and determined by HuC/GuC
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* firmware size and set of hardware requirements/restrictions as shown below:
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*
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* ::
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*
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* +=========> +====================+ <== WOPCM Top
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* ^ | HW contexts RSVD |
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* | +===> +====================+ <== GuC WOPCM Top
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* | ^ | |
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* | | | |
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* | | | |
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* | GuC | |
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* | WOPCM | |
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* | Size +--------------------+
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* WOPCM | | GuC FW RSVD |
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* | | +--------------------+
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* | | | GuC Stack RSVD |
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* | | +------------------- +
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* | v | GuC WOPCM RSVD |
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* | +===> +====================+ <== GuC WOPCM base
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* | | WOPCM RSVD |
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* | +------------------- + <== HuC Firmware Top
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* v | HuC FW |
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* +=========> +====================+ <== WOPCM Base
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*
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* GuC accessible WOPCM starts at GuC WOPCM base and ends at GuC WOPCM top.
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* The top part of the WOPCM is reserved for hardware contexts (e.g. RC6
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* context).
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*/
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/* Default WOPCM size is 2MB from Gen11, 1MB on previous platforms */
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/* FIXME: Larger size require for 2 tile PVC, do a proper probe sooner or later */
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#define DGFX_WOPCM_SIZE SZ_4M
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/* FIXME: Larger size require for MTL, do a proper probe sooner or later */
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#define MTL_WOPCM_SIZE SZ_4M
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#define WOPCM_SIZE SZ_2M
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#define MAX_WOPCM_SIZE SZ_8M
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/* 16KB WOPCM (RSVD WOPCM) is reserved from HuC firmware top. */
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#define WOPCM_RESERVED_SIZE SZ_16K
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/* 16KB reserved at the beginning of GuC WOPCM. */
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#define GUC_WOPCM_RESERVED SZ_16K
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/* 8KB from GUC_WOPCM_RESERVED is reserved for GuC stack. */
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#define GUC_WOPCM_STACK_RESERVED SZ_8K
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/* GuC WOPCM Offset value needs to be aligned to 16KB. */
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#define GUC_WOPCM_OFFSET_ALIGNMENT (1UL << GUC_WOPCM_OFFSET_SHIFT)
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/* 36KB WOPCM reserved at the end of WOPCM */
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#define WOPCM_HW_CTX_RESERVED (SZ_32K + SZ_4K)
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static inline struct xe_gt *wopcm_to_gt(struct xe_wopcm *wopcm)
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{
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return container_of(wopcm, struct xe_gt, uc.wopcm);
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}
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static inline struct xe_device *wopcm_to_xe(struct xe_wopcm *wopcm)
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{
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return gt_to_xe(wopcm_to_gt(wopcm));
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}
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static u32 context_reserved_size(void)
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{
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return WOPCM_HW_CTX_RESERVED;
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}
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static bool __check_layout(struct xe_device *xe, u32 wopcm_size,
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u32 guc_wopcm_base, u32 guc_wopcm_size,
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u32 guc_fw_size, u32 huc_fw_size)
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{
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const u32 ctx_rsvd = context_reserved_size();
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u32 size;
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size = wopcm_size - ctx_rsvd;
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if (unlikely(guc_wopcm_base >= size ||
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guc_wopcm_size > size - guc_wopcm_base)) {
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drm_err(&xe->drm,
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"WOPCM: invalid GuC region layout: %uK + %uK > %uK\n",
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guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K,
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size / SZ_1K);
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return false;
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}
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size = guc_fw_size + GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
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if (unlikely(guc_wopcm_size < size)) {
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drm_err(&xe->drm, "WOPCM: no space for %s: %uK < %uK\n",
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xe_uc_fw_type_repr(XE_UC_FW_TYPE_GUC),
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guc_wopcm_size / SZ_1K, size / SZ_1K);
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return false;
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}
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size = huc_fw_size + WOPCM_RESERVED_SIZE;
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if (unlikely(guc_wopcm_base < size)) {
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drm_err(&xe->drm, "WOPCM: no space for %s: %uK < %uK\n",
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xe_uc_fw_type_repr(XE_UC_FW_TYPE_HUC),
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guc_wopcm_base / SZ_1K, size / SZ_1K);
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return false;
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}
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return true;
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}
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static bool __wopcm_regs_locked(struct xe_gt *gt,
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u32 *guc_wopcm_base, u32 *guc_wopcm_size)
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{
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u32 reg_base = xe_mmio_read32(gt, DMA_GUC_WOPCM_OFFSET);
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u32 reg_size = xe_mmio_read32(gt, GUC_WOPCM_SIZE);
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if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
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!(reg_base & GUC_WOPCM_OFFSET_VALID))
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return false;
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*guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
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*guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
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return true;
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}
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static int __wopcm_init_regs(struct xe_device *xe, struct xe_gt *gt,
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struct xe_wopcm *wopcm)
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{
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u32 base = wopcm->guc.base;
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u32 size = wopcm->guc.size;
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u32 huc_agent = xe_uc_fw_is_available(>->uc.huc.fw) ? HUC_LOADING_AGENT_GUC : 0;
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u32 mask;
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int err;
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XE_WARN_ON(!(base & GUC_WOPCM_OFFSET_MASK));
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XE_WARN_ON(base & ~GUC_WOPCM_OFFSET_MASK);
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XE_WARN_ON(!(size & GUC_WOPCM_SIZE_MASK));
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XE_WARN_ON(size & ~GUC_WOPCM_SIZE_MASK);
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mask = GUC_WOPCM_SIZE_MASK | GUC_WOPCM_SIZE_LOCKED;
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err = xe_mmio_write32_and_verify(gt, GUC_WOPCM_SIZE, size, mask,
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size | GUC_WOPCM_SIZE_LOCKED);
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if (err)
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goto err_out;
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mask = GUC_WOPCM_OFFSET_MASK | GUC_WOPCM_OFFSET_VALID | huc_agent;
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err = xe_mmio_write32_and_verify(gt, DMA_GUC_WOPCM_OFFSET,
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base | huc_agent, mask,
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base | huc_agent |
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GUC_WOPCM_OFFSET_VALID);
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if (err)
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goto err_out;
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return 0;
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err_out:
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drm_notice(&xe->drm, "Failed to init uC WOPCM registers!\n");
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drm_notice(&xe->drm, "%s(%#x)=%#x\n", "DMA_GUC_WOPCM_OFFSET",
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DMA_GUC_WOPCM_OFFSET.addr,
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xe_mmio_read32(gt, DMA_GUC_WOPCM_OFFSET));
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drm_notice(&xe->drm, "%s(%#x)=%#x\n", "GUC_WOPCM_SIZE",
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GUC_WOPCM_SIZE.addr,
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xe_mmio_read32(gt, GUC_WOPCM_SIZE));
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return err;
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}
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u32 xe_wopcm_size(struct xe_device *xe)
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{
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return IS_DGFX(xe) ? DGFX_WOPCM_SIZE :
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xe->info.platform == XE_METEORLAKE ? MTL_WOPCM_SIZE :
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WOPCM_SIZE;
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}
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/**
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* xe_wopcm_init() - Initialize the WOPCM structure.
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* @wopcm: pointer to xe_wopcm.
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*
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* This function will partition WOPCM space based on GuC and HuC firmware sizes
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* and will allocate max remaining for use by GuC. This function will also
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* enforce platform dependent hardware restrictions on GuC WOPCM offset and
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* size. It will fail the WOPCM init if any of these checks fail, so that the
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* following WOPCM registers setup and GuC firmware uploading would be aborted.
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*/
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int xe_wopcm_init(struct xe_wopcm *wopcm)
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{
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struct xe_device *xe = wopcm_to_xe(wopcm);
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struct xe_gt *gt = wopcm_to_gt(wopcm);
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u32 guc_fw_size = xe_uc_fw_get_upload_size(>->uc.guc.fw);
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u32 huc_fw_size = xe_uc_fw_get_upload_size(>->uc.huc.fw);
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u32 ctx_rsvd = context_reserved_size();
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u32 guc_wopcm_base;
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u32 guc_wopcm_size;
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bool locked;
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int ret = 0;
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if (!guc_fw_size)
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return -EINVAL;
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wopcm->size = xe_wopcm_size(xe);
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drm_dbg(&xe->drm, "WOPCM: %uK\n", wopcm->size / SZ_1K);
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xe_force_wake_assert_held(gt_to_fw(gt), XE_FW_GT);
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XE_WARN_ON(guc_fw_size >= wopcm->size);
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XE_WARN_ON(huc_fw_size >= wopcm->size);
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XE_WARN_ON(ctx_rsvd + WOPCM_RESERVED_SIZE >= wopcm->size);
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locked = __wopcm_regs_locked(gt, &guc_wopcm_base, &guc_wopcm_size);
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if (locked) {
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drm_dbg(&xe->drm, "GuC WOPCM is already locked [%uK, %uK)\n",
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guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
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/*
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* When the GuC wopcm base and size are preprogrammed by
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* BIOS/IFWI, check against the max allowed wopcm size to
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* validate if the programmed values align to the wopcm layout.
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*/
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wopcm->size = MAX_WOPCM_SIZE;
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goto check;
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}
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/*
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* Aligned value of guc_wopcm_base will determine available WOPCM space
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* for HuC firmware and mandatory reserved area.
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*/
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guc_wopcm_base = huc_fw_size + WOPCM_RESERVED_SIZE;
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guc_wopcm_base = ALIGN(guc_wopcm_base, GUC_WOPCM_OFFSET_ALIGNMENT);
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/*
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* Need to clamp guc_wopcm_base now to make sure the following math is
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* correct. Formal check of whole WOPCM layout will be done below.
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*/
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guc_wopcm_base = min(guc_wopcm_base, wopcm->size - ctx_rsvd);
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/* Aligned remainings of usable WOPCM space can be assigned to GuC. */
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guc_wopcm_size = wopcm->size - ctx_rsvd - guc_wopcm_base;
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guc_wopcm_size &= GUC_WOPCM_SIZE_MASK;
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drm_dbg(&xe->drm, "Calculated GuC WOPCM [%uK, %uK)\n",
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guc_wopcm_base / SZ_1K, guc_wopcm_size / SZ_1K);
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check:
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if (__check_layout(xe, wopcm->size, guc_wopcm_base, guc_wopcm_size,
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guc_fw_size, huc_fw_size)) {
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wopcm->guc.base = guc_wopcm_base;
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wopcm->guc.size = guc_wopcm_size;
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XE_WARN_ON(!wopcm->guc.base);
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XE_WARN_ON(!wopcm->guc.size);
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} else {
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drm_notice(&xe->drm, "Unsuccessful WOPCM partitioning\n");
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return -E2BIG;
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}
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if (!locked)
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ret = __wopcm_init_regs(xe, gt, wopcm);
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return ret;
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}
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