Paul Burton 252d6aa605 MIPS: CM: Fix GCR_Cx_CONFIG PVPE mask
The PVPE (or PVP in >= CM3) field is 10 bits wide, but the mask
previously only covered the bottom 9 bits. Extend the mask to cover all
10 bits of the field.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/11206/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-11-11 08:35:11 +01:00
..
2015-10-26 09:49:43 +01:00
2015-10-02 09:48:57 +02:00
2015-08-26 15:23:03 +02:00
2015-09-25 11:16:53 -07:00
2015-10-26 09:49:45 +01:00