59b18a1e65
The x86 MSI message data is 32 bits in total and is either in
compatibility or remappable format, see Intel Virtualization Technology
for Directed I/O, section 5.1.2.
Fixes: 6285aa50736 ("x86/msi: Provide msi message shadow structs")
Co-developed-by: Adrian-Ken Rueegsegger <ken@codelabs.ch>
Signed-off-by: Adrian-Ken Rueegsegger <ken@codelabs.ch>
Signed-off-by: Reto Buerki <reet@codelabs.ch>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220407110647.67372-1-reet@codelabs.ch
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_MSI_H
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#define _ASM_X86_MSI_H
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#include <asm/hw_irq.h>
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#include <asm/irqdomain.h>
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typedef struct irq_alloc_info msi_alloc_info_t;
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int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
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msi_alloc_info_t *arg);
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/* Structs and defines for the X86 specific MSI message format */
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typedef struct x86_msi_data {
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union {
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struct {
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u32 vector : 8,
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delivery_mode : 3,
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dest_mode_logical : 1,
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reserved : 2,
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active_low : 1,
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is_level : 1;
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};
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u32 dmar_subhandle;
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};
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} __attribute__ ((packed)) arch_msi_msg_data_t;
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#define arch_msi_msg_data x86_msi_data
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typedef struct x86_msi_addr_lo {
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union {
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struct {
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u32 reserved_0 : 2,
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dest_mode_logical : 1,
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redirect_hint : 1,
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reserved_1 : 1,
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virt_destid_8_14 : 7,
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destid_0_7 : 8,
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base_address : 12;
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};
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struct {
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u32 dmar_reserved_0 : 2,
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dmar_index_15 : 1,
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dmar_subhandle_valid : 1,
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dmar_format : 1,
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dmar_index_0_14 : 15,
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dmar_base_address : 12;
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};
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};
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} __attribute__ ((packed)) arch_msi_msg_addr_lo_t;
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#define arch_msi_msg_addr_lo x86_msi_addr_lo
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#define X86_MSI_BASE_ADDRESS_LOW (0xfee00000 >> 20)
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typedef struct x86_msi_addr_hi {
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u32 reserved : 8,
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destid_8_31 : 24;
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} __attribute__ ((packed)) arch_msi_msg_addr_hi_t;
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#define arch_msi_msg_addr_hi x86_msi_addr_hi
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#define X86_MSI_BASE_ADDRESS_HIGH (0)
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struct msi_msg;
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u32 x86_msi_msg_get_destid(struct msi_msg *msg, bool extid);
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#endif /* _ASM_X86_MSI_H */
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