2786c9622e
This patch reorders clock definitions, so they are sorted by register addresses and bitfield shifts. When at it, blank lines are added to separate definitions of clocks from different registers. Overall this should make the driver more readable and reduce the number of potential conflicts when adding new entries. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Tested-by: Tomasz Figa <t.figa@samsung.com> |
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| .. | ||
| clk-exynos4.c | ||
| clk-exynos5250.c | ||
| clk-exynos5420.c | ||
| clk-exynos5440.c | ||
| clk-exynos-audss.c | ||
| clk-pll.c | ||
| clk-pll.h | ||
| clk-s3c64xx.c | ||
| clk.c | ||
| clk.h | ||
| Makefile | ||