4bbaf764e1
Move qca8k driver to qca dir in preparation for code split and introduction of ipq4019 switch based on qca8k. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
126 lines
3.4 KiB
Plaintext
126 lines
3.4 KiB
Plaintext
# SPDX-License-Identifier: GPL-2.0-only
|
|
menu "Distributed Switch Architecture drivers"
|
|
depends on NET_DSA
|
|
|
|
source "drivers/net/dsa/b53/Kconfig"
|
|
|
|
config NET_DSA_BCM_SF2
|
|
tristate "Broadcom Starfighter 2 Ethernet switch support"
|
|
depends on HAS_IOMEM
|
|
select NET_DSA_TAG_BRCM
|
|
select FIXED_PHY
|
|
select BCM7XXX_PHY
|
|
select MDIO_BCM_UNIMAC
|
|
select B53
|
|
help
|
|
This enables support for the Broadcom Starfighter 2 Ethernet
|
|
switch chips.
|
|
|
|
config NET_DSA_LOOP
|
|
tristate "DSA mock-up Ethernet switch chip support"
|
|
select FIXED_PHY
|
|
help
|
|
This enables support for a fake mock-up switch chip which
|
|
exercises the DSA APIs.
|
|
|
|
source "drivers/net/dsa/hirschmann/Kconfig"
|
|
|
|
config NET_DSA_LANTIQ_GSWIP
|
|
tristate "Lantiq / Intel GSWIP"
|
|
depends on HAS_IOMEM
|
|
select NET_DSA_TAG_GSWIP
|
|
help
|
|
This enables support for the Lantiq / Intel GSWIP 2.1 found in
|
|
the xrx200 / VR9 SoC.
|
|
|
|
config NET_DSA_MT7530
|
|
tristate "MediaTek MT753x and MT7621 Ethernet switch support"
|
|
select NET_DSA_TAG_MTK
|
|
select MEDIATEK_GE_PHY
|
|
help
|
|
This enables support for the MediaTek MT7530, MT7531, and MT7621
|
|
Ethernet switch chips.
|
|
|
|
config NET_DSA_MV88E6060
|
|
tristate "Marvell 88E6060 ethernet switch chip support"
|
|
select NET_DSA_TAG_TRAILER
|
|
help
|
|
This enables support for the Marvell 88E6060 ethernet switch
|
|
chip.
|
|
|
|
source "drivers/net/dsa/microchip/Kconfig"
|
|
|
|
source "drivers/net/dsa/mv88e6xxx/Kconfig"
|
|
|
|
source "drivers/net/dsa/ocelot/Kconfig"
|
|
|
|
source "drivers/net/dsa/qca/Kconfig"
|
|
|
|
source "drivers/net/dsa/sja1105/Kconfig"
|
|
|
|
source "drivers/net/dsa/xrs700x/Kconfig"
|
|
|
|
source "drivers/net/dsa/realtek/Kconfig"
|
|
|
|
config NET_DSA_RZN1_A5PSW
|
|
tristate "Renesas RZ/N1 A5PSW Ethernet switch support"
|
|
depends on OF && ARCH_RZN1
|
|
select NET_DSA_TAG_RZN1_A5PSW
|
|
select PCS_RZN1_MIIC
|
|
help
|
|
This driver supports the A5PSW switch, which is embedded in Renesas
|
|
RZ/N1 SoC.
|
|
|
|
config NET_DSA_SMSC_LAN9303
|
|
tristate
|
|
select NET_DSA_TAG_LAN9303
|
|
select REGMAP
|
|
help
|
|
This enables support for the SMSC/Microchip LAN9303 3 port ethernet
|
|
switch chips.
|
|
|
|
config NET_DSA_SMSC_LAN9303_I2C
|
|
tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
|
|
depends on I2C
|
|
depends on VLAN_8021Q || VLAN_8021Q=n
|
|
select NET_DSA_SMSC_LAN9303
|
|
select REGMAP_I2C
|
|
help
|
|
Enable access functions if the SMSC/Microchip LAN9303 is configured
|
|
for I2C managed mode.
|
|
|
|
config NET_DSA_SMSC_LAN9303_MDIO
|
|
tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in MDIO managed mode"
|
|
select NET_DSA_SMSC_LAN9303
|
|
depends on VLAN_8021Q || VLAN_8021Q=n
|
|
help
|
|
Enable access functions if the SMSC/Microchip LAN9303 is configured
|
|
for MDIO managed mode.
|
|
|
|
config NET_DSA_VITESSE_VSC73XX
|
|
tristate
|
|
select FIXED_PHY
|
|
select VITESSE_PHY
|
|
select GPIOLIB
|
|
help
|
|
This enables support for the Vitesse VSC7385, VSC7388,
|
|
VSC7395 and VSC7398 SparX integrated ethernet switches.
|
|
|
|
config NET_DSA_VITESSE_VSC73XX_SPI
|
|
tristate "Vitesse VSC7385/7388/7395/7398 SPI mode support"
|
|
depends on SPI
|
|
select NET_DSA_VITESSE_VSC73XX
|
|
help
|
|
This enables support for the Vitesse VSC7385, VSC7388, VSC7395
|
|
and VSC7398 SparX integrated ethernet switches in SPI managed mode.
|
|
|
|
config NET_DSA_VITESSE_VSC73XX_PLATFORM
|
|
tristate "Vitesse VSC7385/7388/7395/7398 Platform mode support"
|
|
depends on HAS_IOMEM
|
|
select NET_DSA_VITESSE_VSC73XX
|
|
help
|
|
This enables support for the Vitesse VSC7385, VSC7388, VSC7395
|
|
and VSC7398 SparX integrated ethernet switches, connected over
|
|
a CPU-attached address bus and work in memory-mapped I/O mode.
|
|
endmenu
|