Conor Dooley 2a0805f55b

fpga: microchip-spi: add missing module author entry ...

Add the missing MODULE_AUTHOR entry for the Microchip spi-slave FPGA
programming driver.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Ivan Bornyakov <i.bornyakov@metrotek.ru>
Reviewed-by: Tom Rix <trix@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20220728075012.3136914-1-conor.dooley@microchip.com
Signed-off-by: Xu Yilun <yilun.xu@intel.com>

2022-08-15 11:38:57 +08:00

..

altera-cvp.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

altera-fpga2sdram.c

fpga: bridge: Use standard dev_release for class driver

2021-11-28 14:02:13 -08:00

altera-freeze-bridge.c

fpga: bridge: Use standard dev_release for class driver

2021-11-28 14:02:13 -08:00

altera-hps2fpga.c

fpga: bridge: Use standard dev_release for class driver

2021-11-28 14:02:13 -08:00

altera-pr-ip-core-plat.c

fpga: fpga-mgr: altera-pr-ip: Simplify registration

2020-12-01 18:49:32 +01:00

altera-pr-ip-core.c

fpga: altera-pr-ip: fix unsigned comparison with less than zero

2022-06-10 15:48:23 +08:00

altera-ps-spi.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

dfl-afu-dma-region.c

fpga: dfl: afu: convert get_user_pages() --> pin_user_pages()

2020-06-18 18:12:06 -07:00

dfl-afu-error.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-main.c

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-afu-region.c

fpga: dfl: afu: add afu sub feature support

2018-07-15 13:55:47 +02:00

dfl-afu.h

fpga: dfl: afu: harden port enable logic

2021-03-24 11:15:04 -07:00

dfl-fme-br.c

fpga: bridge: Use standard dev_release for class driver

2021-11-28 14:02:13 -08:00

dfl-fme-error.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-main.c

fpga: dfl: fme: add interrupt support for global error reporting

2020-07-06 21:35:42 -07:00

dfl-fme-mgr.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

dfl-fme-perf.c

fpga: dfl: fme: Fix cpu hotplug issue in performance reporting

2021-07-27 11:05:16 -07:00

dfl-fme-pr.c

fpga: fix spelling mistakes

2021-07-21 19:54:21 -07:00

dfl-fme-pr.h

fpga: dfl: fme: add partial reconfiguration sub feature support

2018-07-15 13:55:46 +02:00

dfl-fme-region.c

fpga: region: Use standard dev_release for class driver

2021-11-28 14:02:41 -08:00

dfl-fme.h

fpga: dfl: fme: add performance reporting support

2020-04-28 15:49:28 +02:00

dfl-n3000-nios.c

fpga: fix spelling mistakes

2021-07-21 19:54:21 -07:00

dfl-pci.c

fpga: dfl-pci: Add IDs for Intel N6000, N6001 and C6100 cards

2022-08-15 11:38:31 +08:00

dfl.c

fpga: Directly use ida_alloc()/free()

2022-06-08 17:04:39 +08:00

dfl.h

fpga: dfl: Allow Port to be linked to FME's DFL

2022-05-10 16:05:38 +08:00

fpga-bridge.c

fpga: Directly use ida_alloc()/free()

2022-06-08 17:04:39 +08:00

fpga-mgr.c

fpga: fpga-mgr: Fix spelling mistake "bitsream" -> "bitstream"

2022-06-29 15:18:18 +08:00

fpga-region.c

fpga: Directly use ida_alloc()/free()

2022-06-08 17:04:39 +08:00

ice40-spi.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

intel-m10-bmc-sec-update.c

fpga: m10bmc-sec: add max10 secure update functions

2022-06-08 17:04:39 +08:00

Kconfig

fpga: microchip-spi: add Microchip MPF FPGA manager

2022-06-24 12:12:31 +08:00

machxo2-spi.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

Makefile

fpga: microchip-spi: add Microchip MPF FPGA manager

2022-06-24 12:12:31 +08:00

microchip-spi.c

fpga: microchip-spi: add missing module author entry

2022-08-15 11:38:57 +08:00

of-fpga-region.c

fpga: fpga-region: fix kernel-doc formatting issues

2022-05-10 16:05:00 +08:00

socfpga-a10.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

socfpga.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

stratix10-soc.c

fpga: stratix10-soc: Do not use ret uninitialized in s10_probe()

2021-12-02 20:07:17 -08:00

ts73xx-fpga.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

versal-fpga.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

xilinx-pr-decoupler.c

fpga: bridge: Use standard dev_release for class driver

2021-11-28 14:02:13 -08:00

xilinx-spi.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

zynq-fpga.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00

zynqmp-fpga.c

fpga: mgr: Use standard dev_release for class driver

2021-11-28 13:59:13 -08:00