linux/drivers/w1/masters
Paul Walmsley 2acd089471 W1: OMAP HDQ1W: use 32-bit register accesses
HDQ/1-wire registers are 32 bits long, even if the register contents
fit into 8 bits, so accesses must be 32-bit aligned.  Evidently the
OMAP2/3 interconnects allowed the driver to get away with 8 bit accesses,
but the OMAP4 puts a stop to that:

[    1.488800] Driver for 1-wire Dallas network protocol.
[    1.495025] Bad mode in data abort handler detected
[    1.500122] Internal error: Oops - bad mode: 0 [#1] SMP
[    1.505615] Modules linked in:
[    1.508819] CPU: 0    Not tainted  (3.3.0-rc1-00008-g45030e9 #992)
[    1.515289] PC is at 0xffff0018
[    1.518615] LR is at omap_hdq_probe+0xd4/0x2cc

The OMAP4430 ES2 Rev X TRM does warn about this restriction in section
23.2.6.2 "HDQ/1-Wire Registers".

Fixes the crash on OMAP4430 ES2 Pandaboard.  Tested also on OMAP34xx and
OMAP2420; it seems to work fine on those chips, although due to the lack
of boards with HDQ/1-wire devices here, a more indepth test was not
possible.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: NeilBrown <neilb@suse.de>
Cc: Evgeniy Polyakov <zbr@ioremap.net>
Acked-by: Evgeniy Polyakov <zbr@ioremap.net>
2012-06-21 21:40:37 -06:00
..
ds1wm.c w1: ds1wm: add a reset recovery parameter 2011-07-08 21:14:44 -07:00
ds2482.c
ds2490.c USB: convert some miscellanies drivers to use module_usb_driver() 2011-11-18 09:52:10 -08:00
Kconfig W1: OMAP HDQ1W: allow driver to be built on all OMAP2+ 2012-06-21 21:40:37 -06:00
Makefile
matrox_w1.c MAINTAINERS: Evgeniy has moved 2011-08-25 16:25:33 -07:00
mxc_w1.c w1 i.MX: prepare/unprepare clock 2012-04-25 17:03:41 +02:00
omap_hdq.c W1: OMAP HDQ1W: use 32-bit register accesses 2012-06-21 21:40:37 -06:00
w1-gpio.c w1: Use linux/gpio.h rather than asm/gpio.h 2012-02-09 08:36:05 -08:00