Dan Williams 2adfc550b6 ioat3: disable cacheline-unaligned transfers for raid operations ...

There are cases where cacheline-unaligned raid operations can hang the
dma channel.  Simply disable these operations by increasing the
alignment constraints published to async_tx.  The raid456 driver always
issues page aligned requests, so the only in-kernel user of the ioatdma
driver that is affected by this change is dmatest.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>

2010-05-01 15:22:56 -07:00

..

dca.c

ioat3: dca and raid operations are incompatible

2009-11-19 17:07:10 -07:00

dma_v2.c

ioat2,3: convert to producer/consumer locking

2010-05-01 15:22:55 -07:00

dma_v2.h

ioat2,3: convert to producer/consumer locking

2010-05-01 15:22:55 -07:00

dma_v3.c

ioat3: disable cacheline-unaligned transfers for raid operations

2010-05-01 15:22:56 -07:00

dma.c

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

2010-03-30 22:02:32 +09:00

dma.h

ioat2,3: convert to producer/consumer locking

2010-05-01 15:22:55 -07:00

hw.h

ioat3: dca and raid operations are incompatible

2009-11-19 17:07:10 -07:00

Makefile

ioat3: split ioat3 support to its own file, add memset

2009-09-08 17:42:55 -07:00

pci.c

include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h

2010-03-30 22:02:32 +09:00

registers.h

ioat3: interrupt coalescing

2010-03-03 21:21:13 -07:00