2874c5fd28
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
119 lines
4.4 KiB
C
119 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Samsung S5P G2D - 2D Graphics Accelerator Driver
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* Kamil Debski, <k.debski@samsung.com>
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*/
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/* General Registers */
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#define SOFT_RESET_REG 0x0000 /* Software reset reg */
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#define INTEN_REG 0x0004 /* Interrupt Enable reg */
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#define INTC_PEND_REG 0x000C /* Interrupt Control Pending reg */
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#define FIFO_STAT_REG 0x0010 /* Command FIFO Status reg */
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#define AXI_ID_MODE_REG 0x0014 /* AXI Read ID Mode reg */
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#define CACHECTL_REG 0x0018 /* Cache & Buffer clear reg */
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#define AXI_MODE_REG 0x001C /* AXI Mode reg */
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/* Command Registers */
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#define BITBLT_START_REG 0x0100 /* BitBLT Start reg */
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#define BITBLT_COMMAND_REG 0x0104 /* Command reg for BitBLT */
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/* Parameter Setting Registers (Rotate & Direction) */
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#define ROTATE_REG 0x0200 /* Rotation reg */
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#define SRC_MSK_DIRECT_REG 0x0204 /* Src and Mask Direction reg */
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#define DST_PAT_DIRECT_REG 0x0208 /* Dest and Pattern Direction reg */
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/* Parameter Setting Registers (Src) */
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#define SRC_SELECT_REG 0x0300 /* Src Image Selection reg */
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#define SRC_BASE_ADDR_REG 0x0304 /* Src Image Base Address reg */
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#define SRC_STRIDE_REG 0x0308 /* Src Stride reg */
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#define SRC_COLOR_MODE_REG 0x030C /* Src Image Color Mode reg */
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#define SRC_LEFT_TOP_REG 0x0310 /* Src Left Top Coordinate reg */
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#define SRC_RIGHT_BOTTOM_REG 0x0314 /* Src Right Bottom Coordinate reg */
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#define SRC_SCALE_CTRL_REG 0x0328 /* Src Scaling type select */
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#define SRC_XSCALE_REG 0x032c /* Src X Scaling ratio */
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#define SRC_YSCALE_REG 0x0330 /* Src Y Scaling ratio */
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/* Parameter Setting Registers (Dest) */
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#define DST_SELECT_REG 0x0400 /* Dest Image Selection reg */
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#define DST_BASE_ADDR_REG 0x0404 /* Dest Image Base Address reg */
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#define DST_STRIDE_REG 0x0408 /* Dest Stride reg */
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#define DST_COLOR_MODE_REG 0x040C /* Dest Image Color Mode reg */
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#define DST_LEFT_TOP_REG 0x0410 /* Dest Left Top Coordinate reg */
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#define DST_RIGHT_BOTTOM_REG 0x0414 /* Dest Right Bottom Coordinate reg */
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/* Parameter Setting Registers (Pattern) */
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#define PAT_BASE_ADDR_REG 0x0500 /* Pattern Image Base Address reg */
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#define PAT_SIZE_REG 0x0504 /* Pattern Image Size reg */
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#define PAT_COLOR_MODE_REG 0x0508 /* Pattern Image Color Mode reg */
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#define PAT_OFFSET_REG 0x050C /* Pattern Left Top Coordinate reg */
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#define PAT_STRIDE_REG 0x0510 /* Pattern Stride reg */
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/* Parameter Setting Registers (Mask) */
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#define MASK_BASE_ADDR_REG 0x0520 /* Mask Base Address reg */
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#define MASK_STRIDE_REG 0x0524 /* Mask Stride reg */
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/* Parameter Setting Registers (Clipping Window) */
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#define CW_LT_REG 0x0600 /* LeftTop coordinates of Clip Window */
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#define CW_RB_REG 0x0604 /* RightBottom coordinates of Clip
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Window */
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/* Parameter Setting Registers (ROP & Alpha Setting) */
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#define THIRD_OPERAND_REG 0x0610 /* Third Operand Selection reg */
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#define ROP4_REG 0x0614 /* Raster Operation reg */
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#define ALPHA_REG 0x0618 /* Alpha value, Fading offset value */
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/* Parameter Setting Registers (Color) */
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#define FG_COLOR_REG 0x0700 /* Foreground Color reg */
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#define BG_COLOR_REG 0x0704 /* Background Color reg */
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#define BS_COLOR_REG 0x0708 /* Blue Screen Color reg */
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/* Parameter Setting Registers (Color Key) */
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#define SRC_COLORKEY_CTRL_REG 0x0710 /* Src Colorkey control reg */
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#define SRC_COLORKEY_DR_MIN_REG 0x0714 /* Src Colorkey Decision Reference
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Min reg */
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#define SRC_COLORKEY_DR_MAX_REG 0x0718 /* Src Colorkey Decision Reference
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Max reg */
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#define DST_COLORKEY_CTRL_REG 0x071C /* Dest Colorkey control reg */
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#define DST_COLORKEY_DR_MIN_REG 0x0720 /* Dest Colorkey Decision Reference
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Min reg */
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#define DST_COLORKEY_DR_MAX_REG 0x0724 /* Dest Colorkey Decision Reference
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Max reg */
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/* Color mode values */
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#define ORDER_XRGB 0
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#define ORDER_RGBX 1
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#define ORDER_XBGR 2
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#define ORDER_BGRX 3
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#define MODE_XRGB_8888 0
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#define MODE_ARGB_8888 1
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#define MODE_RGB_565 2
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#define MODE_XRGB_1555 3
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#define MODE_ARGB_1555 4
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#define MODE_XRGB_4444 5
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#define MODE_ARGB_4444 6
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#define MODE_PACKED_RGB_888 7
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#define COLOR_MODE(o, m) (((o) << 4) | (m))
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/* ROP4 operation values */
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#define ROP4_COPY 0xCCCC
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#define ROP4_INVERT 0x3333
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/* Hardware limits */
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#define MAX_WIDTH 8000
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#define MAX_HEIGHT 8000
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#define G2D_TIMEOUT 500
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#define DEFAULT_WIDTH 100
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#define DEFAULT_HEIGHT 100
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#define DEFAULT_SCALE_MODE (2 << 0)
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/* Command mode register values */
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#define CMD_V3_ENABLE_STRETCH (1 << 4)
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