e629bf40d3
Add the bindings for the clock drivers of the MediaTek Helio X10 MT6795 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220921091455.41327-5-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
55 lines
1.2 KiB
YAML
55 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mediatek,mt6795-sys-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek System Clock Controller for MT6795
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maintainers:
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- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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- Chun-Jie Chen <chun-jie.chen@mediatek.com>
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description:
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The Mediatek system clock controller provides various clocks and system
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configuration like reset and bus protection on MT6795.
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properties:
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compatible:
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items:
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- enum:
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- mediatek,mt6795-apmixedsys
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- mediatek,mt6795-infracfg
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- mediatek,mt6795-pericfg
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- mediatek,mt6795-topckgen
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- const: syscon
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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topckgen: clock-controller@10000000 {
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compatible = "mediatek,mt6795-topckgen", "syscon";
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reg = <0 0x10000000 0 0x1000>;
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#clock-cells = <1>;
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};
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};
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