657e932665
The Snapdragon 670 clocks will be added into the sdm845 gcc driver. Most of the new clocks, GDSCs, and resets already have reserved IDs but there are some resources that don't. Add the new clock from Snapdragon 670 and document the differences between the SoC parent clocks. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220914013922.198778-2-mailingradian@gmail.com
102 lines
2.3 KiB
YAML
102 lines
2.3 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on SDM845
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See also:
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- dt-bindings/clock/qcom,gcc-sdm845.h
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properties:
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compatible:
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enum:
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- qcom,gcc-sdm670
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- qcom,gcc-sdm845
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clocks:
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minItems: 3
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maxItems: 5
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clock-names:
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minItems: 3
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maxItems: 5
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power-domains:
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maxItems: 1
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required:
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- compatible
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allOf:
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- $ref: qcom,gcc.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: qcom,gcc-sdm670
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Board active XO source
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- description: Sleep clock source
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clock-names:
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items:
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- const: bi_tcxo
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- const: bi_tcxo_ao
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- const: sleep_clk
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- if:
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properties:
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compatible:
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contains:
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const: qcom,gcc-sdm845
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then:
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properties:
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clocks:
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items:
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- description: Board XO source
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- description: Board active XO source
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- description: Sleep clock source
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- description: PCIE 0 Pipe clock source
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- description: PCIE 1 Pipe clock source
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clock-names:
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items:
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- const: bi_tcxo
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- const: bi_tcxo_ao
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- const: sleep_clk
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- const: pcie_0_pipe_clk
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- const: pcie_1_pipe_clk
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unevaluatedProperties: false
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examples:
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# Example for GCC for SDM845:
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- |
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#include <dt-bindings/clock/qcom,rpmh.h>
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clock-controller@100000 {
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compatible = "qcom,gcc-sdm845";
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reg = <0x100000 0x1f0000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&rpmhcc RPMH_CXO_CLK_A>,
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<&sleep_clk>,
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<&pcie0_lane>,
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<&pcie1_lane>;
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clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk", "pcie_0_pipe_clk", "pcie_1_pipe_clk";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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};
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...
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